ARC64: Add enter_s/leave_s instructions

Author: claziss

opcodes/arc64-tbl.h

@@ -3994,6 +3994,11 @@
 /* dsync  00100010011011110001RRRRRR111111.  */
 { "dsync", 0x226F103F, 0xFFFFF03F,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, CONTROL, NONE, { 0 }, { 0 }},
 
+/* enter_s u6 110000UU111uuuu0.  */
+{ "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, ENTER, NONE, { BRAKET, RRANGE_EL, FP_EL, BLINK_EL, BRAKETdup }, { 0 }},
+{ "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, ENTER, NONE, { BRAKET, R13_EL, FP_EL, BLINK_EL, BRAKETdup }, { 0 }},
+{ "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, ENTER, NONE, { UIMM6_11_S }, { 0 }},
+ 
 /* ex<.di> b,c 00100bbb00101111DBBBCCCCCC001100.  */
 { "ex", 0x202F000C, 0xF8FF003F,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, MEMORY, NONE, { RB, BRAKET, RC, BRAKETdup }, { C_DI16 }},
 
@@ -4653,6 +4658,11 @@
 /* ld_s R1,GP,s11 01010SSSSSS00sss.  */
 { "ld_s", 0x00005000, 0x0000F818,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LOAD, CD2, { R1_S, BRAKET, GP_S, SIMM11_A32_13_S, BRAKETdup }, { 0 }},
 
+/* leave_s u7 11000UUU110uuuu0.  */
+{ "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LEAVE, NONE, { BRAKET, RRANGE_EL, FP_EL, BLINK_EL, PCL_EL, BRAKETdup }, { 0 }},
+{ "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LEAVE, NONE, { BRAKET, R13_EL, FP_EL, BLINK_EL, PCL_EL, BRAKETdup }, { 0 }},
+{ "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LEAVE, NONE, { UIMM7_11_S }, { 0 }},
+
 /* llock<.di> b,c 00100bbb00101111DBBBCCCCCC010000.  */
 { "llock", 0x202F0010, 0xF8FF003F,ARC_OPCODE_ARC32 | ARC_OPCODE_ARC64, LLOCK, NONE, { RB, BRAKET, RC, BRAKETdup }, { C_DI16 }},