diff --git a/.github/scripts/find_all_boards.sh b/.github/scripts/find_all_boards.sh index 67b46661ca5..c37d306151e 100755 --- a/.github/scripts/find_all_boards.sh +++ b/.github/scripts/find_all_boards.sh @@ -8,7 +8,7 @@ boards_list=$(grep '.tarch=' boards.txt) while read -r line; do board_name=$(echo "$line" | cut -d '.' -f1 | cut -d '#' -f1) # skip esp32c2 as we dont build libs for it - if [ "$board_name" == "esp32c2" ]; then + if [ "$board_name" == "esp32c2" ] || [ "$board_name" == "esp32c61" ]; then echo "Skipping 'espressif:esp32:$board_name'" continue fi diff --git a/.github/workflows/build_component.yml b/.github/workflows/build_component.yml index e5c0f244f65..1092df0932a 100644 --- a/.github/workflows/build_component.yml +++ b/.github/workflows/build_component.yml @@ -10,7 +10,7 @@ on: required: true idf_targets: description: "IDF Targets" - default: "esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c6,esp32h2,esp32p4" + default: "esp32,esp32c2,esp32c3,esp32c6,esp32c61,esp32h2,esp32p4,esp32s2,esp32s3" type: "string" required: false push: @@ -37,6 +37,7 @@ on: - "variants/esp32c3/**" - "variants/esp32c5/**" - "variants/esp32c6/**" + - "variants/esp32c61/**" - "variants/esp32h2/**" - "variants/esp32p4/**" - "variants/esp32s2/**" @@ -119,13 +120,13 @@ jobs: get_targets_for_version() { case "$1" in "release-v5.3") - echo "esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c6,esp32h2,esp32p4" + echo "esp32,esp32c2,esp32c3,esp32c6,esp32h2,esp32p4,esp32s2,esp32s3" ;; "release-v5.4") - echo "esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c6,esp32h2,esp32p4" + echo "esp32,esp32c2,esp32c3,esp32c6,esp32h2,esp32p4,esp32s2,esp32s3" ;; "release-v5.5") - echo "esp32,esp32s2,esp32s3,esp32c2,esp32c3,esp32c5,esp32c6,esp32h2,esp32p4" + echo "esp32,esp32c2,esp32c3,esp32c5,esp32c6,esp32c61,esp32h2,esp32p4,esp32s2,esp32s3" ;; *) echo "" diff --git a/CMakeLists.txt b/CMakeLists.txt index d9b295dfa70..a48d0b1ae85 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -378,7 +378,7 @@ set(priv_requires fatfs nvs_flash app_update spiffs bootloader_support bt esp_hi if(NOT CONFIG_ARDUINO_SELECTIVE_COMPILATION OR CONFIG_ARDUINO_SELECTIVE_OpenThread) #if(CONFIG_SOC_IEEE802154_SUPPORTED) # Does not work! #if(CONFIG_OPENTHREAD_ENABLED) # Does not work! - if(IDF_TARGET STREQUAL "esp32c6" OR IDF_TARGET STREQUAL "esp32h2" OR IDF_TARGET STREQUAL "esp32c5") # Sadly only this works + if(IDF_TARGET STREQUAL "esp32c6" OR IDF_TARGET STREQUAL "esp32h2" OR IDF_TARGET STREQUAL "esp32c5" OR IDF_TARGET STREQUAL "esp32c61") # Sadly only this works list(APPEND requires openthread) endif() endif() diff --git a/README.md b/README.md index 51ab98e0af1..e6a0eb2dffb 100644 --- a/README.md +++ b/README.md @@ -76,7 +76,7 @@ Here are the ESP32 series supported by the Arduino-ESP32 project: | ESP32-S3 | Yes | Yes | [ESP32-S3](https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf) | > [!NOTE] -> ESP32-C2 is also supported by Arduino-ESP32 but requires using Arduino as an ESP-IDF component or rebuilding the static libraries. +> ESP32-C2 and ESP32-C61 are also supported by Arduino-ESP32 but require using Arduino as an ESP-IDF component or rebuilding the static libraries. > For more information, see the [Arduino as an ESP-IDF component documentation](https://docs.espressif.com/projects/arduino-esp32/en/latest/esp-idf_component.html) or the > [Lib Builder documentation](https://docs.espressif.com/projects/arduino-esp32/en/latest/lib_builder.html), respectively. diff --git a/boards.txt b/boards.txt index 9add21d43e7..aedf6fdf13d 100644 --- a/boards.txt +++ b/boards.txt @@ -46,6 +46,203 @@ esp32_family.build.board=ESP32_FAMILY ############################################################## +esp32.name=ESP32 Dev Module + +esp32.bootloader.tool=esptool_py +esp32.bootloader.tool.default=esptool_py + +esp32.upload.tool=esptool_py +esp32.upload.tool.default=esptool_py +esp32.upload.tool.network=esp_ota + +esp32.upload.maximum_size=1310720 +esp32.upload.maximum_data_size=327680 +esp32.upload.flags= +esp32.upload.extra_flags= + +esp32.serial.disableDTR=true +esp32.serial.disableRTS=true + +esp32.build.tarch=xtensa +esp32.build.bootloader_addr=0x1000 +esp32.build.target=esp32 +esp32.build.mcu=esp32 +esp32.build.core=esp32 +esp32.build.variant=esp32 +esp32.build.board=ESP32_DEV + +esp32.build.f_cpu=240000000L +esp32.build.flash_size=4MB +esp32.build.flash_freq=40m +esp32.build.flash_mode=dio +esp32.build.boot=dio +esp32.build.partitions=default +esp32.build.defines= +esp32.build.loop_core= +esp32.build.event_core= + +## IDE 2.0 Seems to not update the value +esp32.menu.JTAGAdapter.default=Disabled +esp32.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32.menu.JTAGAdapter.external=FTDI Adapter +esp32.menu.JTAGAdapter.external.build.openocdscript=esp32-wrover-kit-3.3v.cfg +esp32.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32.menu.JTAGAdapter.bridge.build.openocdscript=esp32-bridge.cfg +esp32.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 + +esp32.menu.PSRAM.disabled=Disabled +esp32.menu.PSRAM.disabled.build.defines= +esp32.menu.PSRAM.disabled.build.extra_libs= +esp32.menu.PSRAM.enabled=Enabled +esp32.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw +esp32.menu.PSRAM.enabled.build.extra_libs= + +esp32.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32.menu.PartitionScheme.default.build.partitions=default +esp32.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32.menu.PartitionScheme.minimal.build.partitions=minimal +esp32.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +esp32.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +esp32.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +esp32.menu.PartitionScheme.rainmaker=RainMaker 4MB +esp32.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +esp32.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 +esp32.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA +esp32.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota +esp32.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 +esp32.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB +esp32.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB +esp32.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 +esp32.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs +esp32.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr +esp32.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 +esp32.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs +esp32.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB +esp32.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 +esp32.menu.PartitionScheme.custom=Custom +esp32.menu.PartitionScheme.custom.build.partitions= +esp32.menu.PartitionScheme.custom.upload.maximum_size=16777216 + +esp32.menu.CPUFreq.240=240MHz (WiFi/BT) +esp32.menu.CPUFreq.240.build.f_cpu=240000000L +esp32.menu.CPUFreq.160=160MHz (WiFi/BT) +esp32.menu.CPUFreq.160.build.f_cpu=160000000L +esp32.menu.CPUFreq.80=80MHz (WiFi/BT) +esp32.menu.CPUFreq.80.build.f_cpu=80000000L +esp32.menu.CPUFreq.40=40MHz (40MHz XTAL) +esp32.menu.CPUFreq.40.build.f_cpu=40000000L +esp32.menu.CPUFreq.26=26MHz (26MHz XTAL) +esp32.menu.CPUFreq.26.build.f_cpu=26000000L +esp32.menu.CPUFreq.20=20MHz (40MHz XTAL) +esp32.menu.CPUFreq.20.build.f_cpu=20000000L +esp32.menu.CPUFreq.13=13MHz (26MHz XTAL) +esp32.menu.CPUFreq.13.build.f_cpu=13000000L +esp32.menu.CPUFreq.10=10MHz (40MHz XTAL) +esp32.menu.CPUFreq.10.build.f_cpu=10000000L + +esp32.menu.FlashMode.qio=QIO +esp32.menu.FlashMode.qio.build.flash_mode=dio +esp32.menu.FlashMode.qio.build.boot=qio +esp32.menu.FlashMode.dio=DIO +esp32.menu.FlashMode.dio.build.flash_mode=dio +esp32.menu.FlashMode.dio.build.boot=dio + +esp32.menu.FlashFreq.80=80MHz +esp32.menu.FlashFreq.80.build.flash_freq=80m +esp32.menu.FlashFreq.40=40MHz +esp32.menu.FlashFreq.40.build.flash_freq=40m + +esp32.menu.FlashSize.4M=4MB (32Mb) +esp32.menu.FlashSize.4M.build.flash_size=4MB +esp32.menu.FlashSize.8M=8MB (64Mb) +esp32.menu.FlashSize.8M.build.flash_size=8MB +esp32.menu.FlashSize.2M=2MB (16Mb) +esp32.menu.FlashSize.2M.build.flash_size=2MB +esp32.menu.FlashSize.16M=16MB (128Mb) +esp32.menu.FlashSize.16M.build.flash_size=16MB + +esp32.menu.UploadSpeed.921600=921600 +esp32.menu.UploadSpeed.921600.upload.speed=921600 +esp32.menu.UploadSpeed.115200=115200 +esp32.menu.UploadSpeed.115200.upload.speed=115200 +esp32.menu.UploadSpeed.256000.windows=256000 +esp32.menu.UploadSpeed.256000.upload.speed=256000 +esp32.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32.menu.UploadSpeed.230400=230400 +esp32.menu.UploadSpeed.230400.upload.speed=230400 +esp32.menu.UploadSpeed.460800.linux=460800 +esp32.menu.UploadSpeed.460800.macosx=460800 +esp32.menu.UploadSpeed.460800.upload.speed=460800 +esp32.menu.UploadSpeed.512000.windows=512000 +esp32.menu.UploadSpeed.512000.upload.speed=512000 + +esp32.menu.LoopCore.1=Core 1 +esp32.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1 +esp32.menu.LoopCore.0=Core 0 +esp32.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0 + +esp32.menu.EventsCore.1=Core 1 +esp32.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1 +esp32.menu.EventsCore.0=Core 0 +esp32.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0 + +esp32.menu.DebugLevel.none=None +esp32.menu.DebugLevel.none.build.code_debug=0 +esp32.menu.DebugLevel.error=Error +esp32.menu.DebugLevel.error.build.code_debug=1 +esp32.menu.DebugLevel.warn=Warn +esp32.menu.DebugLevel.warn.build.code_debug=2 +esp32.menu.DebugLevel.info=Info +esp32.menu.DebugLevel.info.build.code_debug=3 +esp32.menu.DebugLevel.debug=Debug +esp32.menu.DebugLevel.debug.build.code_debug=4 +esp32.menu.DebugLevel.verbose=Verbose +esp32.menu.DebugLevel.verbose.build.code_debug=5 + +esp32.menu.EraseFlash.none=Disabled +esp32.menu.EraseFlash.none.upload.erase_cmd= +esp32.menu.EraseFlash.all=Enabled +esp32.menu.EraseFlash.all.upload.erase_cmd=-e + +esp32.menu.ZigbeeMode.default=Disabled +esp32.menu.ZigbeeMode.default.build.zigbee_mode= +esp32.menu.ZigbeeMode.default.build.zigbee_libs= +esp32.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) +esp32.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR +esp32.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote + +############################################################## + esp32c2.name=ESP32C2 Dev Module esp32c2.hide=true @@ -163,44 +360,227 @@ esp32c2.menu.EraseFlash.all.upload.erase_cmd=-e ############################################################## -esp32c5.name=ESP32C5 Dev Module +esp32c3.name=ESP32C3 Dev Module -esp32c5.bootloader.tool=esptool_py -esp32c5.bootloader.tool.default=esptool_py +esp32c3.bootloader.tool=esptool_py +esp32c3.bootloader.tool.default=esptool_py -esp32c5.upload.tool=esptool_py -esp32c5.upload.tool.default=esptool_py -esp32c5.upload.tool.network=esp_ota +esp32c3.upload.tool=esptool_py +esp32c3.upload.tool.default=esptool_py +esp32c3.upload.tool.network=esp_ota -esp32c5.upload.maximum_size=1310720 -esp32c5.upload.maximum_data_size=327680 -esp32c5.upload.flags= -esp32c5.upload.extra_flags= -esp32c5.upload.use_1200bps_touch=false -esp32c5.upload.wait_for_upload_port=false +esp32c3.upload.maximum_size=1310720 +esp32c3.upload.maximum_data_size=327680 +esp32c3.upload.flags= +esp32c3.upload.extra_flags= +esp32c3.upload.use_1200bps_touch=false +esp32c3.upload.wait_for_upload_port=false -esp32c5.serial.disableDTR=false -esp32c5.serial.disableRTS=false +esp32c3.serial.disableDTR=false +esp32c3.serial.disableRTS=false -esp32c5.build.tarch=riscv32 -esp32c5.build.target=esp -esp32c5.build.mcu=esp32c5 -esp32c5.build.core=esp32 -esp32c5.build.variant=esp32c5 -esp32c5.build.board=ESP32C5_DEV -esp32c5.build.bootloader_addr=0x2000 +esp32c3.build.tarch=riscv32 +esp32c3.build.target=esp +esp32c3.build.mcu=esp32c3 +esp32c3.build.core=esp32 +esp32c3.build.variant=esp32c3 +esp32c3.build.board=ESP32C3_DEV +esp32c3.build.bootloader_addr=0x0 -esp32c5.build.cdc_on_boot=0 -esp32c5.build.f_cpu=240000000L -esp32c5.build.flash_size=4MB -esp32c5.build.flash_freq=80m -esp32c5.build.flash_mode=qio -esp32c5.build.boot=qio -esp32c5.build.partitions=default -esp32c5.build.defines= +esp32c3.build.cdc_on_boot=0 +esp32c3.build.f_cpu=160000000L +esp32c3.build.flash_size=4MB +esp32c3.build.flash_freq=80m +esp32c3.build.flash_mode=qio +esp32c3.build.boot=qio +esp32c3.build.partitions=default +esp32c3.build.defines= ## IDE 2.0 Seems to not update the value -esp32c5.menu.JTAGAdapter.default=Disabled +esp32c3.menu.JTAGAdapter.default=Disabled +esp32c3.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32c3.menu.JTAGAdapter.builtin=Integrated USB JTAG +esp32c3.menu.JTAGAdapter.builtin.build.openocdscript=esp32c3-builtin.cfg +esp32c3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 +esp32c3.menu.JTAGAdapter.external=FTDI Adapter +esp32c3.menu.JTAGAdapter.external.build.openocdscript=esp32c3-ftdi.cfg +esp32c3.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32c3.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32c3.menu.JTAGAdapter.bridge.build.openocdscript=esp32c3-bridge.cfg +esp32c3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 + +esp32c3.menu.CDCOnBoot.default=Disabled +esp32c3.menu.CDCOnBoot.default.build.cdc_on_boot=0 +esp32c3.menu.CDCOnBoot.cdc=Enabled +esp32c3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 + +esp32c3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32c3.menu.PartitionScheme.default.build.partitions=default +esp32c3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32c3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32c3.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32c3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32c3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32c3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32c3.menu.PartitionScheme.minimal.build.partitions=minimal +esp32c3.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32c3.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32c3.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32c3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32c3.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32c3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32c3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32c3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32c3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32c3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32c3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32c3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32c3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32c3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32c3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32c3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32c3.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32c3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32c3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32c3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32c3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32c3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +esp32c3.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32c3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32c3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +esp32c3.menu.PartitionScheme.rainmaker=RainMaker 4MB +esp32c3.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +esp32c3.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 +esp32c3.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA +esp32c3.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota +esp32c3.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 +esp32c3.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB +esp32c3.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB +esp32c3.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 +esp32c3.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs +esp32c3.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr +esp32c3.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 +esp32c3.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs +esp32c3.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB +esp32c3.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 +esp32c3.menu.PartitionScheme.custom=Custom +esp32c3.menu.PartitionScheme.custom.build.partitions= +esp32c3.menu.PartitionScheme.custom.upload.maximum_size=16777216 + +esp32c3.menu.CPUFreq.160=160MHz (WiFi) +esp32c3.menu.CPUFreq.160.build.f_cpu=160000000L +esp32c3.menu.CPUFreq.80=80MHz (WiFi) +esp32c3.menu.CPUFreq.80.build.f_cpu=80000000L +esp32c3.menu.CPUFreq.40=40MHz +esp32c3.menu.CPUFreq.40.build.f_cpu=40000000L +esp32c3.menu.CPUFreq.20=20MHz +esp32c3.menu.CPUFreq.20.build.f_cpu=20000000L +esp32c3.menu.CPUFreq.10=10MHz +esp32c3.menu.CPUFreq.10.build.f_cpu=10000000L + +esp32c3.menu.FlashMode.qio=QIO +esp32c3.menu.FlashMode.qio.build.flash_mode=dio +esp32c3.menu.FlashMode.qio.build.boot=qio +esp32c3.menu.FlashMode.dio=DIO +esp32c3.menu.FlashMode.dio.build.flash_mode=dio +esp32c3.menu.FlashMode.dio.build.boot=dio + +esp32c3.menu.FlashFreq.80=80MHz +esp32c3.menu.FlashFreq.80.build.flash_freq=80m +esp32c3.menu.FlashFreq.40=40MHz +esp32c3.menu.FlashFreq.40.build.flash_freq=40m + +esp32c3.menu.FlashSize.4M=4MB (32Mb) +esp32c3.menu.FlashSize.4M.build.flash_size=4MB +esp32c3.menu.FlashSize.8M=8MB (64Mb) +esp32c3.menu.FlashSize.8M.build.flash_size=8MB +esp32c3.menu.FlashSize.2M=2MB (16Mb) +esp32c3.menu.FlashSize.2M.build.flash_size=2MB +esp32c3.menu.FlashSize.16M=16MB (128Mb) +esp32c3.menu.FlashSize.16M.build.flash_size=16MB + +esp32c3.menu.UploadSpeed.921600=921600 +esp32c3.menu.UploadSpeed.921600.upload.speed=921600 +esp32c3.menu.UploadSpeed.115200=115200 +esp32c3.menu.UploadSpeed.115200.upload.speed=115200 +esp32c3.menu.UploadSpeed.256000.windows=256000 +esp32c3.menu.UploadSpeed.256000.upload.speed=256000 +esp32c3.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32c3.menu.UploadSpeed.230400=230400 +esp32c3.menu.UploadSpeed.230400.upload.speed=230400 +esp32c3.menu.UploadSpeed.460800.linux=460800 +esp32c3.menu.UploadSpeed.460800.macosx=460800 +esp32c3.menu.UploadSpeed.460800.upload.speed=460800 +esp32c3.menu.UploadSpeed.512000.windows=512000 +esp32c3.menu.UploadSpeed.512000.upload.speed=512000 + +esp32c3.menu.DebugLevel.none=None +esp32c3.menu.DebugLevel.none.build.code_debug=0 +esp32c3.menu.DebugLevel.error=Error +esp32c3.menu.DebugLevel.error.build.code_debug=1 +esp32c3.menu.DebugLevel.warn=Warn +esp32c3.menu.DebugLevel.warn.build.code_debug=2 +esp32c3.menu.DebugLevel.info=Info +esp32c3.menu.DebugLevel.info.build.code_debug=3 +esp32c3.menu.DebugLevel.debug=Debug +esp32c3.menu.DebugLevel.debug.build.code_debug=4 +esp32c3.menu.DebugLevel.verbose=Verbose +esp32c3.menu.DebugLevel.verbose.build.code_debug=5 + +esp32c3.menu.EraseFlash.none=Disabled +esp32c3.menu.EraseFlash.none.upload.erase_cmd= +esp32c3.menu.EraseFlash.all=Enabled +esp32c3.menu.EraseFlash.all.upload.erase_cmd=-e + +esp32c3.menu.ZigbeeMode.default=Disabled +esp32c3.menu.ZigbeeMode.default.build.zigbee_mode= +esp32c3.menu.ZigbeeMode.default.build.zigbee_libs= +esp32c3.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) +esp32c3.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR +esp32c3.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote + +############################################################## + +esp32c5.name=ESP32C5 Dev Module + +esp32c5.bootloader.tool=esptool_py +esp32c5.bootloader.tool.default=esptool_py + +esp32c5.upload.tool=esptool_py +esp32c5.upload.tool.default=esptool_py +esp32c5.upload.tool.network=esp_ota + +esp32c5.upload.maximum_size=1310720 +esp32c5.upload.maximum_data_size=327680 +esp32c5.upload.flags= +esp32c5.upload.extra_flags= +esp32c5.upload.use_1200bps_touch=false +esp32c5.upload.wait_for_upload_port=false + +esp32c5.serial.disableDTR=false +esp32c5.serial.disableRTS=false + +esp32c5.build.tarch=riscv32 +esp32c5.build.target=esp +esp32c5.build.mcu=esp32c5 +esp32c5.build.core=esp32 +esp32c5.build.variant=esp32c5 +esp32c5.build.board=ESP32C5_DEV +esp32c5.build.bootloader_addr=0x2000 + +esp32c5.build.cdc_on_boot=0 +esp32c5.build.f_cpu=240000000L +esp32c5.build.flash_size=4MB +esp32c5.build.flash_freq=80m +esp32c5.build.flash_mode=qio +esp32c5.build.boot=qio +esp32c5.build.partitions=default +esp32c5.build.defines= + +## IDE 2.0 Seems to not update the value +esp32c5.menu.JTAGAdapter.default=Disabled esp32c5.menu.JTAGAdapter.default.build.copy_jtag_files=0 esp32c5.menu.JTAGAdapter.builtin=Integrated USB JTAG esp32c5.menu.JTAGAdapter.builtin.build.openocdscript=esp32c5-builtin.cfg @@ -374,207 +754,379 @@ esp32c5.menu.ZigbeeMode.zczr_debug.build.zigbee_libs=-lesp_zb_api.zczr.debug -lz ############################################################## -esp32p4.name=ESP32P4 Dev Module +esp32c6.name=ESP32C6 Dev Module -esp32p4.bootloader.tool=esptool_py -esp32p4.bootloader.tool.default=esptool_py +esp32c6.bootloader.tool=esptool_py +esp32c6.bootloader.tool.default=esptool_py -esp32p4.upload.tool=esptool_py -esp32p4.upload.tool.default=esptool_py -esp32p4.upload.tool.network=esp_ota +esp32c6.upload.tool=esptool_py +esp32c6.upload.tool.default=esptool_py +esp32c6.upload.tool.network=esp_ota -esp32p4.upload.maximum_size=1310720 -esp32p4.upload.maximum_data_size=327680 -esp32p4.upload.flags= -esp32p4.upload.extra_flags= -esp32p4.upload.use_1200bps_touch=false -esp32p4.upload.wait_for_upload_port=false +esp32c6.upload.maximum_size=1310720 +esp32c6.upload.maximum_data_size=327680 +esp32c6.upload.flags= +esp32c6.upload.extra_flags= +esp32c6.upload.use_1200bps_touch=false +esp32c6.upload.wait_for_upload_port=false -esp32p4.serial.disableDTR=false -esp32p4.serial.disableRTS=false +esp32c6.serial.disableDTR=false +esp32c6.serial.disableRTS=false -esp32p4.build.tarch=riscv32 -esp32p4.build.target=esp -esp32p4.build.mcu=esp32p4 -esp32p4.build.core=esp32 -esp32p4.build.variant=esp32p4 -esp32p4.build.board=ESP32P4_DEV -esp32p4.build.bootloader_addr=0x2000 +esp32c6.build.tarch=riscv32 +esp32c6.build.target=esp +esp32c6.build.mcu=esp32c6 +esp32c6.build.core=esp32 +esp32c6.build.variant=esp32c6 +esp32c6.build.board=ESP32C6_DEV +esp32c6.build.bootloader_addr=0x0 -esp32p4.build.usb_mode=0 -esp32p4.build.cdc_on_boot=0 -esp32p4.build.msc_on_boot=0 -esp32p4.build.dfu_on_boot=0 -esp32p4.build.f_cpu=360000000L -esp32p4.build.flash_size=4MB -esp32p4.build.flash_freq=80m -esp32p4.build.img_freq=80m -esp32p4.build.flash_mode=qio -esp32p4.build.boot=qio -esp32p4.build.partitions=default -esp32p4.build.defines= +esp32c6.build.cdc_on_boot=0 +esp32c6.build.f_cpu=160000000L +esp32c6.build.flash_size=4MB +esp32c6.build.flash_freq=80m +esp32c6.build.flash_mode=qio +esp32c6.build.boot=qio +esp32c6.build.partitions=default +esp32c6.build.defines= ## IDE 2.0 Seems to not update the value -esp32p4.menu.JTAGAdapter.default=Disabled -esp32p4.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32p4.menu.JTAGAdapter.builtin=Integrated USB JTAG -esp32p4.menu.JTAGAdapter.builtin.build.openocdscript=esp32p4-builtin.cfg -esp32p4.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 -esp32p4.menu.JTAGAdapter.external=FTDI Adapter -esp32p4.menu.JTAGAdapter.external.build.openocdscript=esp32p4-ftdi.cfg -esp32p4.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32p4.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32p4.menu.JTAGAdapter.bridge.build.openocdscript=esp32p4-bridge.cfg -esp32p4.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 +esp32c6.menu.JTAGAdapter.default=Disabled +esp32c6.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32c6.menu.JTAGAdapter.builtin=Integrated USB JTAG +esp32c6.menu.JTAGAdapter.builtin.build.openocdscript=esp32c6-builtin.cfg +esp32c6.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 +esp32c6.menu.JTAGAdapter.external=FTDI Adapter +esp32c6.menu.JTAGAdapter.external.build.openocdscript=esp32c6-ftdi.cfg +esp32c6.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32c6.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32c6.menu.JTAGAdapter.bridge.build.openocdscript=esp32c6-bridge.cfg +esp32c6.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 -esp32p4.menu.PSRAM.disabled=Disabled -esp32p4.menu.PSRAM.disabled.build.defines= -esp32p4.menu.PSRAM.enabled=Enabled -esp32p4.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM +esp32c6.menu.CDCOnBoot.default=Disabled +esp32c6.menu.CDCOnBoot.default.build.cdc_on_boot=0 +esp32c6.menu.CDCOnBoot.cdc=Enabled +esp32c6.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 -esp32p4.menu.USBMode.default=USB-OTG (TinyUSB) -esp32p4.menu.USBMode.default.build.usb_mode=0 -esp32p4.menu.USBMode.hwcdc=Hardware CDC and JTAG -esp32p4.menu.USBMode.hwcdc.build.usb_mode=1 +esp32c6.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32c6.menu.PartitionScheme.default.build.partitions=default +esp32c6.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32c6.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32c6.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32c6.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32c6.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32c6.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32c6.menu.PartitionScheme.minimal.build.partitions=minimal +esp32c6.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32c6.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32c6.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32c6.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32c6.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32c6.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32c6.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32c6.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32c6.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32c6.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32c6.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32c6.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32c6.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32c6.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32c6.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32c6.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32c6.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32c6.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32c6.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32c6.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32c6.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32c6.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +esp32c6.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32c6.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32c6.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +esp32c6.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32c6.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +esp32c6.menu.PartitionScheme.rainmaker=RainMaker 4MB +esp32c6.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +esp32c6.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 +esp32c6.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA +esp32c6.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota +esp32c6.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 +esp32c6.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB +esp32c6.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB +esp32c6.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 +esp32c6.menu.PartitionScheme.zigbee_2MB=Zigbee 2MB with spiffs +esp32c6.menu.PartitionScheme.zigbee_2MB.build.partitions=zigbee_2MB +esp32c6.menu.PartitionScheme.zigbee_2MB.upload.maximum_size=1310720 +esp32c6.menu.PartitionScheme.zigbee=Zigbee 4MB with spiffs +esp32c6.menu.PartitionScheme.zigbee.build.partitions=zigbee +esp32c6.menu.PartitionScheme.zigbee.upload.maximum_size=1310720 +esp32c6.menu.PartitionScheme.zigbee_8MB=Zigbee 8MB with spiffs +esp32c6.menu.PartitionScheme.zigbee_8MB.build.partitions=zigbee_8MB +esp32c6.menu.PartitionScheme.zigbee_8MB.upload.maximum_size=3407872 +esp32c6.menu.PartitionScheme.zigbee_zczr_2MB=Zigbee ZCZR 2MB with spiffs +esp32c6.menu.PartitionScheme.zigbee_zczr_2MB.build.partitions=zigbee_zczr_2MB +esp32c6.menu.PartitionScheme.zigbee_zczr_2MB.upload.maximum_size=1310720 +esp32c6.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs +esp32c6.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr +esp32c6.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 +esp32c6.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs +esp32c6.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB +esp32c6.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 +esp32c6.menu.PartitionScheme.custom=Custom +esp32c6.menu.PartitionScheme.custom.build.partitions= +esp32c6.menu.PartitionScheme.custom.upload.maximum_size=16777216 -esp32p4.menu.CDCOnBoot.default=Disabled -esp32p4.menu.CDCOnBoot.default.build.cdc_on_boot=0 -esp32p4.menu.CDCOnBoot.cdc=Enabled -esp32p4.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 +esp32c6.menu.CPUFreq.160=160MHz (WiFi) +esp32c6.menu.CPUFreq.160.build.f_cpu=160000000L +esp32c6.menu.CPUFreq.120=120MHz (WiFi) +esp32c6.menu.CPUFreq.120.build.f_cpu=120000000L +esp32c6.menu.CPUFreq.80=80MHz (WiFi) +esp32c6.menu.CPUFreq.80.build.f_cpu=80000000L +esp32c6.menu.CPUFreq.40=40MHz +esp32c6.menu.CPUFreq.40.build.f_cpu=40000000L +esp32c6.menu.CPUFreq.20=20MHz +esp32c6.menu.CPUFreq.20.build.f_cpu=20000000L +esp32c6.menu.CPUFreq.10=10MHz +esp32c6.menu.CPUFreq.10.build.f_cpu=10000000L -esp32p4.menu.MSCOnBoot.default=Disabled -esp32p4.menu.MSCOnBoot.default.build.msc_on_boot=0 -esp32p4.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode) -esp32p4.menu.MSCOnBoot.msc.build.msc_on_boot=1 +esp32c6.menu.FlashMode.qio=QIO +esp32c6.menu.FlashMode.qio.build.flash_mode=dio +esp32c6.menu.FlashMode.qio.build.boot=qio +esp32c6.menu.FlashMode.dio=DIO +esp32c6.menu.FlashMode.dio.build.flash_mode=dio +esp32c6.menu.FlashMode.dio.build.boot=dio -esp32p4.menu.DFUOnBoot.default=Disabled -esp32p4.menu.DFUOnBoot.default.build.dfu_on_boot=0 -esp32p4.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode) -esp32p4.menu.DFUOnBoot.dfu.build.dfu_on_boot=1 +esp32c6.menu.FlashFreq.80=80MHz +esp32c6.menu.FlashFreq.80.build.flash_freq=80m +esp32c6.menu.FlashFreq.40=40MHz +esp32c6.menu.FlashFreq.40.build.flash_freq=40m -esp32p4.menu.UploadMode.default=UART0 / Hardware CDC -esp32p4.menu.UploadMode.default.upload.use_1200bps_touch=false -esp32p4.menu.UploadMode.default.upload.wait_for_upload_port=false -esp32p4.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB) -esp32p4.menu.UploadMode.cdc.upload.use_1200bps_touch=true -esp32p4.menu.UploadMode.cdc.upload.wait_for_upload_port=true +esp32c6.menu.FlashSize.4M=4MB (32Mb) +esp32c6.menu.FlashSize.4M.build.flash_size=4MB +esp32c6.menu.FlashSize.8M=8MB (64Mb) +esp32c6.menu.FlashSize.8M.build.flash_size=8MB +esp32c6.menu.FlashSize.2M=2MB (16Mb) +esp32c6.menu.FlashSize.2M.build.flash_size=2MB +esp32c6.menu.FlashSize.16M=16MB (128Mb) +esp32c6.menu.FlashSize.16M.build.flash_size=16MB -esp32p4.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) -esp32p4.menu.PartitionScheme.default.build.partitions=default -esp32p4.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) -esp32p4.menu.PartitionScheme.defaultffat.build.partitions=default_ffat -esp32p4.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) -esp32p4.menu.PartitionScheme.default_8MB.build.partitions=default_8MB -esp32p4.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 -esp32p4.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) -esp32p4.menu.PartitionScheme.minimal.build.partitions=minimal -esp32p4.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) -esp32p4.menu.PartitionScheme.no_fs.build.partitions=no_fs -esp32p4.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 -esp32p4.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) -esp32p4.menu.PartitionScheme.no_ota.build.partitions=no_ota -esp32p4.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 -esp32p4.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) -esp32p4.menu.PartitionScheme.noota_3g.build.partitions=noota_3g -esp32p4.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 -esp32p4.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) -esp32p4.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat -esp32p4.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 -esp32p4.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) -esp32p4.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat -esp32p4.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 -esp32p4.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) -esp32p4.menu.PartitionScheme.huge_app.build.partitions=huge_app -esp32p4.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 -esp32p4.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) -esp32p4.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs -esp32p4.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 -esp32p4.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) -esp32p4.menu.PartitionScheme.fatflash.build.partitions=ffat -esp32p4.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 -esp32p4.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) -esp32p4.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB -esp32p4.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 -esp32p4.menu.PartitionScheme.app5M_fat24M_32MB=32M Flash (4.8MB APP/22MB FATFS) -esp32p4.menu.PartitionScheme.app5M_fat24M_32MB.build.partitions=large_fat_32MB -esp32p4.menu.PartitionScheme.app5M_fat24M_32MB.upload.maximum_size=4718592 -esp32p4.menu.PartitionScheme.app5M_little24M_32MB=32M Flash (4.8MB APP/22MB LittleFS) -esp32p4.menu.PartitionScheme.app5M_little24M_32MB.build.partitions=large_littlefs_32MB -esp32p4.menu.PartitionScheme.app5M_little24M_32MB.upload.maximum_size=4718592 -esp32p4.menu.PartitionScheme.app13M_data7M_32MB=32M Flash (13MB APP/6.75MB SPIFFS) -esp32p4.menu.PartitionScheme.app13M_data7M_32MB.build.partitions=default_32MB -esp32p4.menu.PartitionScheme.app13M_data7M_32MB.upload.maximum_size=13107200 -esp32p4.menu.PartitionScheme.esp_sr_16=ESP SR 16M (3MB APP/7MB SPIFFS/2.9MB MODEL) -esp32p4.menu.PartitionScheme.esp_sr_16.upload.maximum_size=3145728 -esp32p4.menu.PartitionScheme.esp_sr_16.upload.extra_flags=0xD10000 {build.path}/srmodels.bin -esp32p4.menu.PartitionScheme.esp_sr_16.build.partitions=esp_sr_16 -esp32p4.menu.PartitionScheme.custom=Custom -esp32p4.menu.PartitionScheme.custom.build.partitions= -esp32p4.menu.PartitionScheme.custom.upload.maximum_size=16777216 +esp32c6.menu.UploadSpeed.921600=921600 +esp32c6.menu.UploadSpeed.921600.upload.speed=921600 +esp32c6.menu.UploadSpeed.115200=115200 +esp32c6.menu.UploadSpeed.115200.upload.speed=115200 +esp32c6.menu.UploadSpeed.256000.windows=256000 +esp32c6.menu.UploadSpeed.256000.upload.speed=256000 +esp32c6.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32c6.menu.UploadSpeed.230400=230400 +esp32c6.menu.UploadSpeed.230400.upload.speed=230400 +esp32c6.menu.UploadSpeed.460800.linux=460800 +esp32c6.menu.UploadSpeed.460800.macosx=460800 +esp32c6.menu.UploadSpeed.460800.upload.speed=460800 +esp32c6.menu.UploadSpeed.512000.windows=512000 +esp32c6.menu.UploadSpeed.512000.upload.speed=512000 -## From https://docs.espressif.com/projects/esp-idf/en/latest/esp32p4/api-reference/kconfig.html#config-esp-default-cpu-freq-mhz -esp32p4.menu.CPUFreq.360=360MHz -esp32p4.menu.CPUFreq.360.build.f_cpu=360000000L -esp32p4.menu.CPUFreq.40=40MHz -esp32p4.menu.CPUFreq.40.build.f_cpu=40000000L +esp32c6.menu.DebugLevel.none=None +esp32c6.menu.DebugLevel.none.build.code_debug=0 +esp32c6.menu.DebugLevel.error=Error +esp32c6.menu.DebugLevel.error.build.code_debug=1 +esp32c6.menu.DebugLevel.warn=Warn +esp32c6.menu.DebugLevel.warn.build.code_debug=2 +esp32c6.menu.DebugLevel.info=Info +esp32c6.menu.DebugLevel.info.build.code_debug=3 +esp32c6.menu.DebugLevel.debug=Debug +esp32c6.menu.DebugLevel.debug.build.code_debug=4 +esp32c6.menu.DebugLevel.verbose=Verbose +esp32c6.menu.DebugLevel.verbose.build.code_debug=5 -esp32p4.menu.FlashMode.qio=QIO -esp32p4.menu.FlashMode.qio.build.flash_mode=dio -esp32p4.menu.FlashMode.qio.build.boot=qio -esp32p4.menu.FlashMode.dio=DIO -esp32p4.menu.FlashMode.dio.build.flash_mode=dio -esp32p4.menu.FlashMode.dio.build.boot=dio +esp32c6.menu.EraseFlash.none=Disabled +esp32c6.menu.EraseFlash.none.upload.erase_cmd= +esp32c6.menu.EraseFlash.all=Enabled +esp32c6.menu.EraseFlash.all.upload.erase_cmd=-e -esp32p4.menu.FlashFreq.80=80MHz -esp32p4.menu.FlashFreq.80.build.flash_freq=80m -esp32p4.menu.FlashFreq.40=40MHz -esp32p4.menu.FlashFreq.40.build.flash_freq=40m +esp32c6.menu.ZigbeeMode.default=Disabled +esp32c6.menu.ZigbeeMode.default.build.zigbee_mode= +esp32c6.menu.ZigbeeMode.default.build.zigbee_libs= +esp32c6.menu.ZigbeeMode.ed=Zigbee ED (end device) +esp32c6.menu.ZigbeeMode.ed.build.zigbee_mode=-DZIGBEE_MODE_ED +esp32c6.menu.ZigbeeMode.ed.build.zigbee_libs=-lesp_zb_api.ed -lzboss_stack.ed -lzboss_port.native +esp32c6.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) +esp32c6.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR +esp32c6.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.native +esp32c6.menu.ZigbeeMode.ed_debug=Zigbee ED (end device) - Debug +esp32c6.menu.ZigbeeMode.ed_debug.build.zigbee_mode=-DZIGBEE_MODE_ED +esp32c6.menu.ZigbeeMode.ed_debug.build.zigbee_libs=-lesp_zb_api.ed.debug -lzboss_stack.ed.debug -lzboss_port.native.debug +esp32c6.menu.ZigbeeMode.zczr_debug=Zigbee ZCZR (coordinator/router) - Debug +esp32c6.menu.ZigbeeMode.zczr_debug.build.zigbee_mode=-DZIGBEE_MODE_ZCZR +esp32c6.menu.ZigbeeMode.zczr_debug.build.zigbee_libs=-lesp_zb_api.zczr.debug -lzboss_stack.zczr.debug -lzboss_port.native.debug -esp32p4.menu.FlashSize.4M=4MB (32Mb) -esp32p4.menu.FlashSize.4M.build.flash_size=4MB -esp32p4.menu.FlashSize.8M=8MB (64Mb) -esp32p4.menu.FlashSize.8M.build.flash_size=8MB -esp32p4.menu.FlashSize.8M.build.partitions=default_8MB -esp32p4.menu.FlashSize.2M=2MB (16Mb) -esp32p4.menu.FlashSize.2M.build.flash_size=2MB -esp32p4.menu.FlashSize.2M.build.partitions=minimal -esp32p4.menu.FlashSize.16M=16MB (128Mb) -esp32p4.menu.FlashSize.16M.build.flash_size=16MB -esp32p4.menu.FlashSize.32M=32MB (256Mb) -esp32p4.menu.FlashSize.32M.build.flash_size=32MB +############################################################## -esp32p4.menu.UploadSpeed.921600=921600 -esp32p4.menu.UploadSpeed.921600.upload.speed=921600 -esp32p4.menu.UploadSpeed.115200=115200 -esp32p4.menu.UploadSpeed.115200.upload.speed=115200 -esp32p4.menu.UploadSpeed.256000.windows=256000 -esp32p4.menu.UploadSpeed.256000.upload.speed=256000 -esp32p4.menu.UploadSpeed.230400.windows.upload.speed=256000 -esp32p4.menu.UploadSpeed.230400=230400 -esp32p4.menu.UploadSpeed.230400.upload.speed=230400 -esp32p4.menu.UploadSpeed.460800.linux=460800 -esp32p4.menu.UploadSpeed.460800.macosx=460800 -esp32p4.menu.UploadSpeed.460800.upload.speed=460800 -esp32p4.menu.UploadSpeed.512000.windows=512000 -esp32p4.menu.UploadSpeed.512000.upload.speed=512000 +esp32c61.name=ESP32C61 Dev Module +esp32c61.hide=true -esp32p4.menu.DebugLevel.none=None -esp32p4.menu.DebugLevel.none.build.code_debug=0 -esp32p4.menu.DebugLevel.error=Error -esp32p4.menu.DebugLevel.error.build.code_debug=1 -esp32p4.menu.DebugLevel.warn=Warn -esp32p4.menu.DebugLevel.warn.build.code_debug=2 -esp32p4.menu.DebugLevel.info=Info -esp32p4.menu.DebugLevel.info.build.code_debug=3 -esp32p4.menu.DebugLevel.debug=Debug -esp32p4.menu.DebugLevel.debug.build.code_debug=4 -esp32p4.menu.DebugLevel.verbose=Verbose -esp32p4.menu.DebugLevel.verbose.build.code_debug=5 +esp32c61.bootloader.tool=esptool_py +esp32c61.bootloader.tool.default=esptool_py -esp32p4.menu.EraseFlash.none=Disabled -esp32p4.menu.EraseFlash.none.upload.erase_cmd= -esp32p4.menu.EraseFlash.all=Enabled -esp32p4.menu.EraseFlash.all.upload.erase_cmd=-e +esp32c61.upload.tool=esptool_py +esp32c61.upload.tool.default=esptool_py +esp32c61.upload.tool.network=esp_ota + +esp32c61.upload.maximum_size=1310720 +esp32c61.upload.maximum_data_size=327680 +esp32c61.upload.flags= +esp32c61.upload.extra_flags= +esp32c61.upload.use_1200bps_touch=false +esp32c61.upload.wait_for_upload_port=false + +esp32c61.serial.disableDTR=false +esp32c61.serial.disableRTS=false + +esp32c61.build.tarch=riscv32 +esp32c61.build.target=esp +esp32c61.build.mcu=esp32c61 +esp32c61.build.core=esp32 +esp32c61.build.variant=esp32c61 +esp32c61.build.board=ESP32C61_DEV +esp32c61.build.bootloader_addr=0x0 + +esp32c61.build.cdc_on_boot=0 +esp32c61.build.f_cpu=160000000L +esp32c61.build.flash_size=4MB +esp32c61.build.flash_freq=80m +esp32c61.build.flash_mode=qio +esp32c61.build.boot=qio +esp32c61.build.partitions=default +esp32c61.build.defines= + +## IDE 2.0 Seems to not update the value +esp32c61.menu.JTAGAdapter.default=Disabled +esp32c61.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32c61.menu.JTAGAdapter.builtin=Integrated USB JTAG +esp32c61.menu.JTAGAdapter.builtin.build.openocdscript=esp32c61-builtin.cfg +esp32c61.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 +esp32c61.menu.JTAGAdapter.external=FTDI Adapter +esp32c61.menu.JTAGAdapter.external.build.openocdscript=esp32c61-ftdi.cfg +esp32c61.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32c61.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32c61.menu.JTAGAdapter.bridge.build.openocdscript=esp32c61-bridge.cfg +esp32c61.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 + +esp32c61.menu.PSRAM.disabled=Disabled +esp32c61.menu.PSRAM.disabled.build.defines= +esp32c61.menu.PSRAM.enabled=Enabled +esp32c61.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM + +esp32c61.menu.CDCOnBoot.default=Disabled +esp32c61.menu.CDCOnBoot.default.build.cdc_on_boot=0 +esp32c61.menu.CDCOnBoot.cdc=Enabled +esp32c61.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 + +esp32c61.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32c61.menu.PartitionScheme.default.build.partitions=default +esp32c61.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32c61.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32c61.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32c61.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32c61.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32c61.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32c61.menu.PartitionScheme.minimal.build.partitions=minimal +esp32c61.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32c61.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32c61.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32c61.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32c61.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32c61.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32c61.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32c61.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32c61.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32c61.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32c61.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32c61.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32c61.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32c61.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32c61.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32c61.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32c61.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32c61.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32c61.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32c61.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32c61.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32c61.menu.PartitionScheme.rainmaker=RainMaker 4MB +esp32c61.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +esp32c61.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 +esp32c61.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA +esp32c61.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota +esp32c61.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 +esp32c61.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB +esp32c61.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB +esp32c61.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 +esp32c61.menu.PartitionScheme.custom=Custom +esp32c61.menu.PartitionScheme.custom.build.partitions= +esp32c61.menu.PartitionScheme.custom.upload.maximum_size=8388608 + +esp32c61.menu.CPUFreq.160=160MHz (WiFi) +esp32c61.menu.CPUFreq.160.build.f_cpu=160000000L +esp32c61.menu.CPUFreq.120=120MHz (WiFi) +esp32c61.menu.CPUFreq.120.build.f_cpu=120000000L +esp32c61.menu.CPUFreq.80=80MHz (WiFi) +esp32c61.menu.CPUFreq.80.build.f_cpu=80000000L +esp32c61.menu.CPUFreq.40=40MHz +esp32c61.menu.CPUFreq.40.build.f_cpu=40000000L +esp32c61.menu.CPUFreq.20=20MHz +esp32c61.menu.CPUFreq.20.build.f_cpu=20000000L +esp32c61.menu.CPUFreq.10=10MHz +esp32c61.menu.CPUFreq.10.build.f_cpu=10000000L + +esp32c61.menu.FlashMode.qio=QIO +esp32c61.menu.FlashMode.qio.build.flash_mode=dio +esp32c61.menu.FlashMode.qio.build.boot=qio +esp32c61.menu.FlashMode.dio=DIO +esp32c61.menu.FlashMode.dio.build.flash_mode=dio +esp32c61.menu.FlashMode.dio.build.boot=dio + +esp32c61.menu.FlashFreq.80=80MHz +esp32c61.menu.FlashFreq.80.build.flash_freq=80m +esp32c61.menu.FlashFreq.40=40MHz +esp32c61.menu.FlashFreq.40.build.flash_freq=40m + +esp32c61.menu.FlashSize.4M=4MB (32Mb) +esp32c61.menu.FlashSize.4M.build.flash_size=4MB +esp32c61.menu.FlashSize.8M=8MB (64Mb) +esp32c61.menu.FlashSize.8M.build.flash_size=8MB +esp32c61.menu.FlashSize.2M=2MB (16Mb) +esp32c61.menu.FlashSize.2M.build.flash_size=2MB + +esp32c61.menu.UploadSpeed.921600=921600 +esp32c61.menu.UploadSpeed.921600.upload.speed=921600 +esp32c61.menu.UploadSpeed.115200=115200 +esp32c61.menu.UploadSpeed.115200.upload.speed=115200 +esp32c61.menu.UploadSpeed.256000.windows=256000 +esp32c61.menu.UploadSpeed.256000.upload.speed=256000 +esp32c61.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32c61.menu.UploadSpeed.230400=230400 +esp32c61.menu.UploadSpeed.230400.upload.speed=230400 +esp32c61.menu.UploadSpeed.460800.linux=460800 +esp32c61.menu.UploadSpeed.460800.macosx=460800 +esp32c61.menu.UploadSpeed.460800.upload.speed=460800 +esp32c61.menu.UploadSpeed.512000.windows=512000 +esp32c61.menu.UploadSpeed.512000.upload.speed=512000 + +esp32c61.menu.DebugLevel.none=None +esp32c61.menu.DebugLevel.none.build.code_debug=0 +esp32c61.menu.DebugLevel.error=Error +esp32c61.menu.DebugLevel.error.build.code_debug=1 +esp32c61.menu.DebugLevel.warn=Warn +esp32c61.menu.DebugLevel.warn.build.code_debug=2 +esp32c61.menu.DebugLevel.info=Info +esp32c61.menu.DebugLevel.info.build.code_debug=3 +esp32c61.menu.DebugLevel.debug=Debug +esp32c61.menu.DebugLevel.debug.build.code_debug=4 +esp32c61.menu.DebugLevel.verbose=Verbose +esp32c61.menu.DebugLevel.verbose.build.code_debug=5 + +esp32c61.menu.EraseFlash.none=Disabled +esp32c61.menu.EraseFlash.none.upload.erase_cmd= +esp32c61.menu.EraseFlash.all=Enabled +esp32c61.menu.EraseFlash.all.upload.erase_cmd=-e ############################################################## @@ -700,6 +1252,15 @@ esp32h2.menu.PartitionScheme.custom=Custom esp32h2.menu.PartitionScheme.custom.build.partitions= esp32h2.menu.PartitionScheme.custom.upload.maximum_size=16777216 +esp32h2.menu.CPUFreq.96=96MHz +esp32h2.menu.CPUFreq.96.build.f_cpu=96000000L +esp32h2.menu.CPUFreq.64=64MHz +esp32h2.menu.CPUFreq.64.build.f_cpu=64000000L +esp32h2.menu.CPUFreq.48=48MHz +esp32h2.menu.CPUFreq.48.build.f_cpu=48000000L +esp32h2.menu.CPUFreq.32=32MHz +esp32h2.menu.CPUFreq.32.build.f_cpu=32000000L + esp32h2.menu.FlashMode.qio=QIO esp32h2.menu.FlashMode.qio.build.flash_mode=dio esp32h2.menu.FlashMode.qio.build.boot=qio @@ -777,278 +1338,486 @@ esp32h2.menu.ZigbeeMode.zczr_debug.build.zigbee_libs=-lesp_zb_api.zczr.debug -lz ############################################################## -esp32c6.name=ESP32C6 Dev Module +esp32p4.name=ESP32P4 Dev Module -esp32c6.bootloader.tool=esptool_py -esp32c6.bootloader.tool.default=esptool_py +esp32p4.bootloader.tool=esptool_py +esp32p4.bootloader.tool.default=esptool_py -esp32c6.upload.tool=esptool_py -esp32c6.upload.tool.default=esptool_py -esp32c6.upload.tool.network=esp_ota +esp32p4.upload.tool=esptool_py +esp32p4.upload.tool.default=esptool_py +esp32p4.upload.tool.network=esp_ota -esp32c6.upload.maximum_size=1310720 -esp32c6.upload.maximum_data_size=327680 -esp32c6.upload.flags= -esp32c6.upload.extra_flags= -esp32c6.upload.use_1200bps_touch=false -esp32c6.upload.wait_for_upload_port=false +esp32p4.upload.maximum_size=1310720 +esp32p4.upload.maximum_data_size=327680 +esp32p4.upload.flags= +esp32p4.upload.extra_flags= +esp32p4.upload.use_1200bps_touch=false +esp32p4.upload.wait_for_upload_port=false -esp32c6.serial.disableDTR=false -esp32c6.serial.disableRTS=false +esp32p4.serial.disableDTR=false +esp32p4.serial.disableRTS=false -esp32c6.build.tarch=riscv32 -esp32c6.build.target=esp -esp32c6.build.mcu=esp32c6 -esp32c6.build.core=esp32 -esp32c6.build.variant=esp32c6 -esp32c6.build.board=ESP32C6_DEV -esp32c6.build.bootloader_addr=0x0 +esp32p4.build.tarch=riscv32 +esp32p4.build.target=esp +esp32p4.build.mcu=esp32p4 +esp32p4.build.core=esp32 +esp32p4.build.variant=esp32p4 +esp32p4.build.board=ESP32P4_DEV +esp32p4.build.bootloader_addr=0x2000 -esp32c6.build.cdc_on_boot=0 -esp32c6.build.f_cpu=160000000L -esp32c6.build.flash_size=4MB -esp32c6.build.flash_freq=80m -esp32c6.build.flash_mode=qio -esp32c6.build.boot=qio -esp32c6.build.partitions=default -esp32c6.build.defines= +esp32p4.build.usb_mode=0 +esp32p4.build.cdc_on_boot=0 +esp32p4.build.msc_on_boot=0 +esp32p4.build.dfu_on_boot=0 +esp32p4.build.f_cpu=360000000L +esp32p4.build.flash_size=4MB +esp32p4.build.flash_freq=80m +esp32p4.build.img_freq=80m +esp32p4.build.flash_mode=qio +esp32p4.build.boot=qio +esp32p4.build.partitions=default +esp32p4.build.defines= ## IDE 2.0 Seems to not update the value -esp32c6.menu.JTAGAdapter.default=Disabled -esp32c6.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32c6.menu.JTAGAdapter.builtin=Integrated USB JTAG -esp32c6.menu.JTAGAdapter.builtin.build.openocdscript=esp32c6-builtin.cfg -esp32c6.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 -esp32c6.menu.JTAGAdapter.external=FTDI Adapter -esp32c6.menu.JTAGAdapter.external.build.openocdscript=esp32c6-ftdi.cfg -esp32c6.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32c6.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32c6.menu.JTAGAdapter.bridge.build.openocdscript=esp32c6-bridge.cfg -esp32c6.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 +esp32p4.menu.JTAGAdapter.default=Disabled +esp32p4.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32p4.menu.JTAGAdapter.builtin=Integrated USB JTAG +esp32p4.menu.JTAGAdapter.builtin.build.openocdscript=esp32p4-builtin.cfg +esp32p4.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 +esp32p4.menu.JTAGAdapter.external=FTDI Adapter +esp32p4.menu.JTAGAdapter.external.build.openocdscript=esp32p4-ftdi.cfg +esp32p4.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32p4.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32p4.menu.JTAGAdapter.bridge.build.openocdscript=esp32p4-bridge.cfg +esp32p4.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 -esp32c6.menu.CDCOnBoot.default=Disabled -esp32c6.menu.CDCOnBoot.default.build.cdc_on_boot=0 -esp32c6.menu.CDCOnBoot.cdc=Enabled -esp32c6.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 +esp32p4.menu.PSRAM.disabled=Disabled +esp32p4.menu.PSRAM.disabled.build.defines= +esp32p4.menu.PSRAM.enabled=Enabled +esp32p4.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -esp32c6.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) -esp32c6.menu.PartitionScheme.default.build.partitions=default -esp32c6.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) -esp32c6.menu.PartitionScheme.defaultffat.build.partitions=default_ffat -esp32c6.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) -esp32c6.menu.PartitionScheme.default_8MB.build.partitions=default_8MB -esp32c6.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 -esp32c6.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) -esp32c6.menu.PartitionScheme.minimal.build.partitions=minimal -esp32c6.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) -esp32c6.menu.PartitionScheme.no_fs.build.partitions=no_fs -esp32c6.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 -esp32c6.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) -esp32c6.menu.PartitionScheme.no_ota.build.partitions=no_ota -esp32c6.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 -esp32c6.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) -esp32c6.menu.PartitionScheme.noota_3g.build.partitions=noota_3g -esp32c6.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 -esp32c6.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) -esp32c6.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat -esp32c6.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 -esp32c6.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) -esp32c6.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat -esp32c6.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 -esp32c6.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) -esp32c6.menu.PartitionScheme.huge_app.build.partitions=huge_app -esp32c6.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 -esp32c6.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) -esp32c6.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs -esp32c6.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 -esp32c6.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) -esp32c6.menu.PartitionScheme.fatflash.build.partitions=ffat -esp32c6.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 -esp32c6.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) -esp32c6.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB -esp32c6.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 -esp32c6.menu.PartitionScheme.rainmaker=RainMaker 4MB -esp32c6.menu.PartitionScheme.rainmaker.build.partitions=rainmaker -esp32c6.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 -esp32c6.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA -esp32c6.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota -esp32c6.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 -esp32c6.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB -esp32c6.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB -esp32c6.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 -esp32c6.menu.PartitionScheme.zigbee_2MB=Zigbee 2MB with spiffs -esp32c6.menu.PartitionScheme.zigbee_2MB.build.partitions=zigbee_2MB -esp32c6.menu.PartitionScheme.zigbee_2MB.upload.maximum_size=1310720 -esp32c6.menu.PartitionScheme.zigbee=Zigbee 4MB with spiffs -esp32c6.menu.PartitionScheme.zigbee.build.partitions=zigbee -esp32c6.menu.PartitionScheme.zigbee.upload.maximum_size=1310720 -esp32c6.menu.PartitionScheme.zigbee_8MB=Zigbee 8MB with spiffs -esp32c6.menu.PartitionScheme.zigbee_8MB.build.partitions=zigbee_8MB -esp32c6.menu.PartitionScheme.zigbee_8MB.upload.maximum_size=3407872 -esp32c6.menu.PartitionScheme.zigbee_zczr_2MB=Zigbee ZCZR 2MB with spiffs -esp32c6.menu.PartitionScheme.zigbee_zczr_2MB.build.partitions=zigbee_zczr_2MB -esp32c6.menu.PartitionScheme.zigbee_zczr_2MB.upload.maximum_size=1310720 -esp32c6.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs -esp32c6.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr -esp32c6.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 -esp32c6.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs -esp32c6.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB -esp32c6.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 -esp32c6.menu.PartitionScheme.custom=Custom -esp32c6.menu.PartitionScheme.custom.build.partitions= -esp32c6.menu.PartitionScheme.custom.upload.maximum_size=16777216 +esp32p4.menu.USBMode.default=USB-OTG (TinyUSB) +esp32p4.menu.USBMode.default.build.usb_mode=0 +esp32p4.menu.USBMode.hwcdc=Hardware CDC and JTAG +esp32p4.menu.USBMode.hwcdc.build.usb_mode=1 -esp32c6.menu.CPUFreq.160=160MHz (WiFi) -esp32c6.menu.CPUFreq.160.build.f_cpu=160000000L -esp32c6.menu.CPUFreq.120=120MHz (WiFi) -esp32c6.menu.CPUFreq.120.build.f_cpu=120000000L -esp32c6.menu.CPUFreq.80=80MHz (WiFi) -esp32c6.menu.CPUFreq.80.build.f_cpu=80000000L -esp32c6.menu.CPUFreq.40=40MHz -esp32c6.menu.CPUFreq.40.build.f_cpu=40000000L -esp32c6.menu.CPUFreq.20=20MHz -esp32c6.menu.CPUFreq.20.build.f_cpu=20000000L -esp32c6.menu.CPUFreq.10=10MHz -esp32c6.menu.CPUFreq.10.build.f_cpu=10000000L +esp32p4.menu.CDCOnBoot.default=Disabled +esp32p4.menu.CDCOnBoot.default.build.cdc_on_boot=0 +esp32p4.menu.CDCOnBoot.cdc=Enabled +esp32p4.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 -esp32c6.menu.FlashMode.qio=QIO -esp32c6.menu.FlashMode.qio.build.flash_mode=dio -esp32c6.menu.FlashMode.qio.build.boot=qio -esp32c6.menu.FlashMode.dio=DIO -esp32c6.menu.FlashMode.dio.build.flash_mode=dio -esp32c6.menu.FlashMode.dio.build.boot=dio +esp32p4.menu.MSCOnBoot.default=Disabled +esp32p4.menu.MSCOnBoot.default.build.msc_on_boot=0 +esp32p4.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode) +esp32p4.menu.MSCOnBoot.msc.build.msc_on_boot=1 -esp32c6.menu.FlashFreq.80=80MHz -esp32c6.menu.FlashFreq.80.build.flash_freq=80m -esp32c6.menu.FlashFreq.40=40MHz -esp32c6.menu.FlashFreq.40.build.flash_freq=40m +esp32p4.menu.DFUOnBoot.default=Disabled +esp32p4.menu.DFUOnBoot.default.build.dfu_on_boot=0 +esp32p4.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode) +esp32p4.menu.DFUOnBoot.dfu.build.dfu_on_boot=1 -esp32c6.menu.FlashSize.4M=4MB (32Mb) -esp32c6.menu.FlashSize.4M.build.flash_size=4MB -esp32c6.menu.FlashSize.8M=8MB (64Mb) -esp32c6.menu.FlashSize.8M.build.flash_size=8MB -esp32c6.menu.FlashSize.2M=2MB (16Mb) -esp32c6.menu.FlashSize.2M.build.flash_size=2MB -esp32c6.menu.FlashSize.16M=16MB (128Mb) -esp32c6.menu.FlashSize.16M.build.flash_size=16MB +esp32p4.menu.UploadMode.default=UART0 / Hardware CDC +esp32p4.menu.UploadMode.default.upload.use_1200bps_touch=false +esp32p4.menu.UploadMode.default.upload.wait_for_upload_port=false +esp32p4.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB) +esp32p4.menu.UploadMode.cdc.upload.use_1200bps_touch=true +esp32p4.menu.UploadMode.cdc.upload.wait_for_upload_port=true -esp32c6.menu.UploadSpeed.921600=921600 -esp32c6.menu.UploadSpeed.921600.upload.speed=921600 -esp32c6.menu.UploadSpeed.115200=115200 -esp32c6.menu.UploadSpeed.115200.upload.speed=115200 -esp32c6.menu.UploadSpeed.256000.windows=256000 -esp32c6.menu.UploadSpeed.256000.upload.speed=256000 -esp32c6.menu.UploadSpeed.230400.windows.upload.speed=256000 -esp32c6.menu.UploadSpeed.230400=230400 -esp32c6.menu.UploadSpeed.230400.upload.speed=230400 -esp32c6.menu.UploadSpeed.460800.linux=460800 -esp32c6.menu.UploadSpeed.460800.macosx=460800 -esp32c6.menu.UploadSpeed.460800.upload.speed=460800 -esp32c6.menu.UploadSpeed.512000.windows=512000 -esp32c6.menu.UploadSpeed.512000.upload.speed=512000 +esp32p4.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32p4.menu.PartitionScheme.default.build.partitions=default +esp32p4.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32p4.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32p4.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32p4.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32p4.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32p4.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32p4.menu.PartitionScheme.minimal.build.partitions=minimal +esp32p4.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32p4.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32p4.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32p4.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32p4.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32p4.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32p4.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32p4.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32p4.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32p4.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32p4.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32p4.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32p4.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32p4.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32p4.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32p4.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32p4.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32p4.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32p4.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32p4.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32p4.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32p4.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +esp32p4.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32p4.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32p4.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +esp32p4.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32p4.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +esp32p4.menu.PartitionScheme.app5M_fat24M_32MB=32M Flash (4.8MB APP/22MB FATFS) +esp32p4.menu.PartitionScheme.app5M_fat24M_32MB.build.partitions=large_fat_32MB +esp32p4.menu.PartitionScheme.app5M_fat24M_32MB.upload.maximum_size=4718592 +esp32p4.menu.PartitionScheme.app5M_little24M_32MB=32M Flash (4.8MB APP/22MB LittleFS) +esp32p4.menu.PartitionScheme.app5M_little24M_32MB.build.partitions=large_littlefs_32MB +esp32p4.menu.PartitionScheme.app5M_little24M_32MB.upload.maximum_size=4718592 +esp32p4.menu.PartitionScheme.app13M_data7M_32MB=32M Flash (13MB APP/6.75MB SPIFFS) +esp32p4.menu.PartitionScheme.app13M_data7M_32MB.build.partitions=default_32MB +esp32p4.menu.PartitionScheme.app13M_data7M_32MB.upload.maximum_size=13107200 +esp32p4.menu.PartitionScheme.esp_sr_16=ESP SR 16M (3MB APP/7MB SPIFFS/2.9MB MODEL) +esp32p4.menu.PartitionScheme.esp_sr_16.upload.maximum_size=3145728 +esp32p4.menu.PartitionScheme.esp_sr_16.upload.extra_flags=0xD10000 {build.path}/srmodels.bin +esp32p4.menu.PartitionScheme.esp_sr_16.build.partitions=esp_sr_16 +esp32p4.menu.PartitionScheme.custom=Custom +esp32p4.menu.PartitionScheme.custom.build.partitions= +esp32p4.menu.PartitionScheme.custom.upload.maximum_size=16777216 -esp32c6.menu.DebugLevel.none=None -esp32c6.menu.DebugLevel.none.build.code_debug=0 -esp32c6.menu.DebugLevel.error=Error -esp32c6.menu.DebugLevel.error.build.code_debug=1 -esp32c6.menu.DebugLevel.warn=Warn -esp32c6.menu.DebugLevel.warn.build.code_debug=2 -esp32c6.menu.DebugLevel.info=Info -esp32c6.menu.DebugLevel.info.build.code_debug=3 -esp32c6.menu.DebugLevel.debug=Debug -esp32c6.menu.DebugLevel.debug.build.code_debug=4 -esp32c6.menu.DebugLevel.verbose=Verbose -esp32c6.menu.DebugLevel.verbose.build.code_debug=5 +## From https://docs.espressif.com/projects/esp-idf/en/latest/esp32p4/api-reference/kconfig.html#config-esp-default-cpu-freq-mhz +esp32p4.menu.CPUFreq.360=360MHz +esp32p4.menu.CPUFreq.360.build.f_cpu=360000000L +esp32p4.menu.CPUFreq.40=40MHz +esp32p4.menu.CPUFreq.40.build.f_cpu=40000000L -esp32c6.menu.EraseFlash.none=Disabled -esp32c6.menu.EraseFlash.none.upload.erase_cmd= -esp32c6.menu.EraseFlash.all=Enabled -esp32c6.menu.EraseFlash.all.upload.erase_cmd=-e +esp32p4.menu.FlashMode.qio=QIO +esp32p4.menu.FlashMode.qio.build.flash_mode=dio +esp32p4.menu.FlashMode.qio.build.boot=qio +esp32p4.menu.FlashMode.dio=DIO +esp32p4.menu.FlashMode.dio.build.flash_mode=dio +esp32p4.menu.FlashMode.dio.build.boot=dio -esp32c6.menu.ZigbeeMode.default=Disabled -esp32c6.menu.ZigbeeMode.default.build.zigbee_mode= -esp32c6.menu.ZigbeeMode.default.build.zigbee_libs= -esp32c6.menu.ZigbeeMode.ed=Zigbee ED (end device) -esp32c6.menu.ZigbeeMode.ed.build.zigbee_mode=-DZIGBEE_MODE_ED -esp32c6.menu.ZigbeeMode.ed.build.zigbee_libs=-lesp_zb_api.ed -lzboss_stack.ed -lzboss_port.native -esp32c6.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) -esp32c6.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR -esp32c6.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.native -esp32c6.menu.ZigbeeMode.ed_debug=Zigbee ED (end device) - Debug -esp32c6.menu.ZigbeeMode.ed_debug.build.zigbee_mode=-DZIGBEE_MODE_ED -esp32c6.menu.ZigbeeMode.ed_debug.build.zigbee_libs=-lesp_zb_api.ed.debug -lzboss_stack.ed.debug -lzboss_port.native.debug -esp32c6.menu.ZigbeeMode.zczr_debug=Zigbee ZCZR (coordinator/router) - Debug -esp32c6.menu.ZigbeeMode.zczr_debug.build.zigbee_mode=-DZIGBEE_MODE_ZCZR -esp32c6.menu.ZigbeeMode.zczr_debug.build.zigbee_libs=-lesp_zb_api.zczr.debug -lzboss_stack.zczr.debug -lzboss_port.native.debug +esp32p4.menu.FlashFreq.80=80MHz +esp32p4.menu.FlashFreq.80.build.flash_freq=80m +esp32p4.menu.FlashFreq.40=40MHz +esp32p4.menu.FlashFreq.40.build.flash_freq=40m + +esp32p4.menu.FlashSize.4M=4MB (32Mb) +esp32p4.menu.FlashSize.4M.build.flash_size=4MB +esp32p4.menu.FlashSize.8M=8MB (64Mb) +esp32p4.menu.FlashSize.8M.build.flash_size=8MB +esp32p4.menu.FlashSize.8M.build.partitions=default_8MB +esp32p4.menu.FlashSize.2M=2MB (16Mb) +esp32p4.menu.FlashSize.2M.build.flash_size=2MB +esp32p4.menu.FlashSize.2M.build.partitions=minimal +esp32p4.menu.FlashSize.16M=16MB (128Mb) +esp32p4.menu.FlashSize.16M.build.flash_size=16MB +esp32p4.menu.FlashSize.32M=32MB (256Mb) +esp32p4.menu.FlashSize.32M.build.flash_size=32MB + +esp32p4.menu.UploadSpeed.921600=921600 +esp32p4.menu.UploadSpeed.921600.upload.speed=921600 +esp32p4.menu.UploadSpeed.115200=115200 +esp32p4.menu.UploadSpeed.115200.upload.speed=115200 +esp32p4.menu.UploadSpeed.256000.windows=256000 +esp32p4.menu.UploadSpeed.256000.upload.speed=256000 +esp32p4.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32p4.menu.UploadSpeed.230400=230400 +esp32p4.menu.UploadSpeed.230400.upload.speed=230400 +esp32p4.menu.UploadSpeed.460800.linux=460800 +esp32p4.menu.UploadSpeed.460800.macosx=460800 +esp32p4.menu.UploadSpeed.460800.upload.speed=460800 +esp32p4.menu.UploadSpeed.512000.windows=512000 +esp32p4.menu.UploadSpeed.512000.upload.speed=512000 + +esp32p4.menu.DebugLevel.none=None +esp32p4.menu.DebugLevel.none.build.code_debug=0 +esp32p4.menu.DebugLevel.error=Error +esp32p4.menu.DebugLevel.error.build.code_debug=1 +esp32p4.menu.DebugLevel.warn=Warn +esp32p4.menu.DebugLevel.warn.build.code_debug=2 +esp32p4.menu.DebugLevel.info=Info +esp32p4.menu.DebugLevel.info.build.code_debug=3 +esp32p4.menu.DebugLevel.debug=Debug +esp32p4.menu.DebugLevel.debug.build.code_debug=4 +esp32p4.menu.DebugLevel.verbose=Verbose +esp32p4.menu.DebugLevel.verbose.build.code_debug=5 + +esp32p4.menu.EraseFlash.none=Disabled +esp32p4.menu.EraseFlash.none.upload.erase_cmd= +esp32p4.menu.EraseFlash.all=Enabled +esp32p4.menu.EraseFlash.all.upload.erase_cmd=-e ############################################################## -esp32s3.name=ESP32S3 Dev Module +esp32s2.name=ESP32S2 Dev Module +esp32s2.vid.0=0x303a +esp32s2.pid.0=0x0002 +esp32s2.upload_port.vid.0=0x303a +esp32s2.upload_port.pid.0=0x0002 -esp32s3.bootloader.tool=esptool_py -esp32s3.bootloader.tool.default=esptool_py +esp32s2.bootloader.tool=esptool_py +esp32s2.bootloader.tool.default=esptool_py -esp32s3.upload.tool=esptool_py -esp32s3.upload.tool.default=esptool_py -esp32s3.upload.tool.network=esp_ota +esp32s2.upload.tool=esptool_py +esp32s2.upload.tool.default=esptool_py +esp32s2.upload.tool.network=esp_ota -esp32s3.upload.maximum_size=1310720 -esp32s3.upload.maximum_data_size=327680 -esp32s3.upload.flags= -esp32s3.upload.extra_flags= -esp32s3.upload.use_1200bps_touch=false -esp32s3.upload.wait_for_upload_port=false +esp32s2.upload.maximum_size=1310720 +esp32s2.upload.maximum_data_size=327680 +esp32s2.upload.flags= +esp32s2.upload.extra_flags= +esp32s2.upload.use_1200bps_touch=false +esp32s2.upload.wait_for_upload_port=false -esp32s3.serial.disableDTR=false -esp32s3.serial.disableRTS=false +esp32s2.serial.disableDTR=false +esp32s2.serial.disableRTS=false -esp32s3.build.tarch=xtensa -esp32s3.build.bootloader_addr=0x0 -esp32s3.build.target=esp32s3 -esp32s3.build.mcu=esp32s3 -esp32s3.build.core=esp32 -esp32s3.build.variant=esp32s3 -esp32s3.build.board=ESP32S3_DEV +esp32s2.build.tarch=xtensa +esp32s2.build.bootloader_addr=0x1000 +esp32s2.build.target=esp32s2 +esp32s2.build.mcu=esp32s2 +esp32s2.build.core=esp32 +esp32s2.build.variant=esp32s2 +esp32s2.build.board=ESP32S2_DEV -esp32s3.build.usb_mode=1 -esp32s3.build.cdc_on_boot=0 -esp32s3.build.msc_on_boot=0 -esp32s3.build.dfu_on_boot=0 -esp32s3.build.f_cpu=240000000L -esp32s3.build.flash_size=4MB -esp32s3.build.flash_freq=80m -esp32s3.build.flash_mode=dio -esp32s3.build.boot=qio -esp32s3.build.boot_freq=80m -esp32s3.build.partitions=default -esp32s3.build.defines= -esp32s3.build.loop_core= -esp32s3.build.event_core= -esp32s3.build.psram_type=qspi -esp32s3.build.memory_type={build.boot}_{build.psram_type} +esp32s2.build.cdc_on_boot=0 +esp32s2.build.msc_on_boot=0 +esp32s2.build.dfu_on_boot=0 +esp32s2.build.f_cpu=240000000L +esp32s2.build.flash_size=4MB +esp32s2.build.flash_freq=80m +esp32s2.build.flash_mode=dio +esp32s2.build.boot=qio +esp32s2.build.partitions=default +esp32s2.build.defines= ## IDE 2.0 Seems to not update the value -esp32s3.menu.JTAGAdapter.default=Disabled -esp32s3.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32s3.menu.JTAGAdapter.builtin=Integrated USB JTAG -esp32s3.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg -esp32s3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 -esp32s3.menu.JTAGAdapter.external=FTDI Adapter -esp32s3.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg -esp32s3.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32s3.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32s3.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg -esp32s3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 +esp32s2.menu.JTAGAdapter.default=Disabled +esp32s2.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32s2.menu.JTAGAdapter.external=FTDI Adapter +esp32s2.menu.JTAGAdapter.external.build.openocdscript=esp32s2-kaluga-1.cfg +esp32s2.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32s2.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32s2.menu.JTAGAdapter.bridge.build.openocdscript=esp32s2-bridge.cfg +esp32s2.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 -esp32s3.menu.PSRAM.disabled=Disabled -esp32s3.menu.PSRAM.disabled.build.defines= -esp32s3.menu.PSRAM.disabled.build.psram_type=qspi -esp32s3.menu.PSRAM.enabled=QSPI PSRAM -esp32s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -esp32s3.menu.PSRAM.enabled.build.psram_type=qspi -esp32s3.menu.PSRAM.opi=OPI PSRAM -esp32s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM -esp32s3.menu.PSRAM.opi.build.psram_type=opi +esp32s2.menu.CDCOnBoot.default=Disabled +esp32s2.menu.CDCOnBoot.default.build.cdc_on_boot=0 +esp32s2.menu.CDCOnBoot.cdc=Enabled +esp32s2.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 + +esp32s2.menu.MSCOnBoot.default=Disabled +esp32s2.menu.MSCOnBoot.default.build.msc_on_boot=0 +esp32s2.menu.MSCOnBoot.msc=Enabled +esp32s2.menu.MSCOnBoot.msc.build.msc_on_boot=1 + +esp32s2.menu.DFUOnBoot.default=Disabled +esp32s2.menu.DFUOnBoot.default.build.dfu_on_boot=0 +esp32s2.menu.DFUOnBoot.dfu=Enabled +esp32s2.menu.DFUOnBoot.dfu.build.dfu_on_boot=1 + +esp32s2.menu.UploadMode.default=UART0 +esp32s2.menu.UploadMode.default.upload.use_1200bps_touch=false +esp32s2.menu.UploadMode.default.upload.wait_for_upload_port=false +esp32s2.menu.UploadMode.cdc=Internal USB +esp32s2.menu.UploadMode.cdc.upload.use_1200bps_touch=true +esp32s2.menu.UploadMode.cdc.upload.wait_for_upload_port=true + +esp32s2.menu.PSRAM.disabled=Disabled +esp32s2.menu.PSRAM.disabled.build.defines= +esp32s2.menu.PSRAM.enabled=Enabled +esp32s2.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM + +esp32s2.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +esp32s2.menu.PartitionScheme.default.build.partitions=default +esp32s2.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +esp32s2.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +esp32s2.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +esp32s2.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +esp32s2.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +esp32s2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +esp32s2.menu.PartitionScheme.minimal.build.partitions=minimal +esp32s2.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) +esp32s2.menu.PartitionScheme.no_fs.build.partitions=no_fs +esp32s2.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 +esp32s2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +esp32s2.menu.PartitionScheme.no_ota.build.partitions=no_ota +esp32s2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +esp32s2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +esp32s2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +esp32s2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +esp32s2.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +esp32s2.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +esp32s2.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +esp32s2.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +esp32s2.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +esp32s2.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +esp32s2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +esp32s2.menu.PartitionScheme.huge_app.build.partitions=huge_app +esp32s2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +esp32s2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +esp32s2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +esp32s2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +esp32s2.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +esp32s2.menu.PartitionScheme.fatflash.build.partitions=ffat +esp32s2.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +esp32s2.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +esp32s2.menu.PartitionScheme.rainmaker=RainMaker 4MB +esp32s2.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +esp32s2.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 +esp32s2.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA +esp32s2.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota +esp32s2.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 +esp32s2.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB +esp32s2.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB +esp32s2.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 +esp32s2.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs +esp32s2.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr +esp32s2.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 +esp32s2.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs +esp32s2.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB +esp32s2.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 +esp32s2.menu.PartitionScheme.custom=Custom +esp32s2.menu.PartitionScheme.custom.build.partitions= +esp32s2.menu.PartitionScheme.custom.upload.maximum_size=16777216 + +esp32s2.menu.CPUFreq.240=240MHz (WiFi) +esp32s2.menu.CPUFreq.240.build.f_cpu=240000000L +esp32s2.menu.CPUFreq.160=160MHz (WiFi) +esp32s2.menu.CPUFreq.160.build.f_cpu=160000000L +esp32s2.menu.CPUFreq.80=80MHz (WiFi) +esp32s2.menu.CPUFreq.80.build.f_cpu=80000000L +esp32s2.menu.CPUFreq.40=40MHz +esp32s2.menu.CPUFreq.40.build.f_cpu=40000000L +esp32s2.menu.CPUFreq.20=20MHz +esp32s2.menu.CPUFreq.20.build.f_cpu=20000000L +esp32s2.menu.CPUFreq.10=10MHz +esp32s2.menu.CPUFreq.10.build.f_cpu=10000000L + +esp32s2.menu.FlashMode.qio=QIO +esp32s2.menu.FlashMode.qio.build.flash_mode=dio +esp32s2.menu.FlashMode.qio.build.boot=qio +esp32s2.menu.FlashMode.dio=DIO +esp32s2.menu.FlashMode.dio.build.flash_mode=dio +esp32s2.menu.FlashMode.dio.build.boot=dio + +esp32s2.menu.FlashFreq.80=80MHz +esp32s2.menu.FlashFreq.80.build.flash_freq=80m +esp32s2.menu.FlashFreq.40=40MHz +esp32s2.menu.FlashFreq.40.build.flash_freq=40m + +esp32s2.menu.FlashSize.4M=4MB (32Mb) +esp32s2.menu.FlashSize.4M.build.flash_size=4MB +esp32s2.menu.FlashSize.8M=8MB (64Mb) +esp32s2.menu.FlashSize.8M.build.flash_size=8MB +esp32s2.menu.FlashSize.2M=2MB (16Mb) +esp32s2.menu.FlashSize.2M.build.flash_size=2MB +esp32s2.menu.FlashSize.16M=16MB (128Mb) +esp32s2.menu.FlashSize.16M.build.flash_size=16MB + +esp32s2.menu.UploadSpeed.921600=921600 +esp32s2.menu.UploadSpeed.921600.upload.speed=921600 +esp32s2.menu.UploadSpeed.115200=115200 +esp32s2.menu.UploadSpeed.115200.upload.speed=115200 +esp32s2.menu.UploadSpeed.256000.windows=256000 +esp32s2.menu.UploadSpeed.256000.upload.speed=256000 +esp32s2.menu.UploadSpeed.230400.windows.upload.speed=256000 +esp32s2.menu.UploadSpeed.230400=230400 +esp32s2.menu.UploadSpeed.230400.upload.speed=230400 +esp32s2.menu.UploadSpeed.460800.linux=460800 +esp32s2.menu.UploadSpeed.460800.macosx=460800 +esp32s2.menu.UploadSpeed.460800.upload.speed=460800 +esp32s2.menu.UploadSpeed.512000.windows=512000 +esp32s2.menu.UploadSpeed.512000.upload.speed=512000 + +esp32s2.menu.DebugLevel.none=None +esp32s2.menu.DebugLevel.none.build.code_debug=0 +esp32s2.menu.DebugLevel.error=Error +esp32s2.menu.DebugLevel.error.build.code_debug=1 +esp32s2.menu.DebugLevel.warn=Warn +esp32s2.menu.DebugLevel.warn.build.code_debug=2 +esp32s2.menu.DebugLevel.info=Info +esp32s2.menu.DebugLevel.info.build.code_debug=3 +esp32s2.menu.DebugLevel.debug=Debug +esp32s2.menu.DebugLevel.debug.build.code_debug=4 +esp32s2.menu.DebugLevel.verbose=Verbose +esp32s2.menu.DebugLevel.verbose.build.code_debug=5 + +esp32s2.menu.EraseFlash.none=Disabled +esp32s2.menu.EraseFlash.none.upload.erase_cmd= +esp32s2.menu.EraseFlash.all=Enabled +esp32s2.menu.EraseFlash.all.upload.erase_cmd=-e + +esp32s2.menu.ZigbeeMode.default=Disabled +esp32s2.menu.ZigbeeMode.default.build.zigbee_mode= +esp32s2.menu.ZigbeeMode.default.build.zigbee_libs= +esp32s2.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) +esp32s2.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR +esp32s2.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote + +############################################################## + +esp32s3.name=ESP32S3 Dev Module + +esp32s3.bootloader.tool=esptool_py +esp32s3.bootloader.tool.default=esptool_py + +esp32s3.upload.tool=esptool_py +esp32s3.upload.tool.default=esptool_py +esp32s3.upload.tool.network=esp_ota + +esp32s3.upload.maximum_size=1310720 +esp32s3.upload.maximum_data_size=327680 +esp32s3.upload.flags= +esp32s3.upload.extra_flags= +esp32s3.upload.use_1200bps_touch=false +esp32s3.upload.wait_for_upload_port=false + +esp32s3.serial.disableDTR=false +esp32s3.serial.disableRTS=false + +esp32s3.build.tarch=xtensa +esp32s3.build.bootloader_addr=0x0 +esp32s3.build.target=esp32s3 +esp32s3.build.mcu=esp32s3 +esp32s3.build.core=esp32 +esp32s3.build.variant=esp32s3 +esp32s3.build.board=ESP32S3_DEV + +esp32s3.build.usb_mode=1 +esp32s3.build.cdc_on_boot=0 +esp32s3.build.msc_on_boot=0 +esp32s3.build.dfu_on_boot=0 +esp32s3.build.f_cpu=240000000L +esp32s3.build.flash_size=4MB +esp32s3.build.flash_freq=80m +esp32s3.build.flash_mode=dio +esp32s3.build.boot=qio +esp32s3.build.boot_freq=80m +esp32s3.build.partitions=default +esp32s3.build.defines= +esp32s3.build.loop_core= +esp32s3.build.event_core= +esp32s3.build.psram_type=qspi +esp32s3.build.memory_type={build.boot}_{build.psram_type} + +## IDE 2.0 Seems to not update the value +esp32s3.menu.JTAGAdapter.default=Disabled +esp32s3.menu.JTAGAdapter.default.build.copy_jtag_files=0 +esp32s3.menu.JTAGAdapter.builtin=Integrated USB JTAG +esp32s3.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg +esp32s3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 +esp32s3.menu.JTAGAdapter.external=FTDI Adapter +esp32s3.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg +esp32s3.menu.JTAGAdapter.external.build.copy_jtag_files=1 +esp32s3.menu.JTAGAdapter.bridge=ESP USB Bridge +esp32s3.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg +esp32s3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 + +esp32s3.menu.PSRAM.disabled=Disabled +esp32s3.menu.PSRAM.disabled.build.defines= +esp32s3.menu.PSRAM.disabled.build.psram_type=qspi +esp32s3.menu.PSRAM.enabled=QSPI PSRAM +esp32s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM +esp32s3.menu.PSRAM.enabled.build.psram_type=qspi +esp32s3.menu.PSRAM.opi=OPI PSRAM +esp32s3.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM +esp32s3.menu.PSRAM.opi.build.psram_type=opi esp32s3.menu.FlashMode.qio=QIO 80MHz esp32s3.menu.FlashMode.qio.build.flash_mode=dio @@ -1240,596 +2009,6 @@ esp32s3.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.z ############################################################## -esp32c3.name=ESP32C3 Dev Module - -esp32c3.bootloader.tool=esptool_py -esp32c3.bootloader.tool.default=esptool_py - -esp32c3.upload.tool=esptool_py -esp32c3.upload.tool.default=esptool_py -esp32c3.upload.tool.network=esp_ota - -esp32c3.upload.maximum_size=1310720 -esp32c3.upload.maximum_data_size=327680 -esp32c3.upload.flags= -esp32c3.upload.extra_flags= -esp32c3.upload.use_1200bps_touch=false -esp32c3.upload.wait_for_upload_port=false - -esp32c3.serial.disableDTR=false -esp32c3.serial.disableRTS=false - -esp32c3.build.tarch=riscv32 -esp32c3.build.target=esp -esp32c3.build.mcu=esp32c3 -esp32c3.build.core=esp32 -esp32c3.build.variant=esp32c3 -esp32c3.build.board=ESP32C3_DEV -esp32c3.build.bootloader_addr=0x0 - -esp32c3.build.cdc_on_boot=0 -esp32c3.build.f_cpu=160000000L -esp32c3.build.flash_size=4MB -esp32c3.build.flash_freq=80m -esp32c3.build.flash_mode=qio -esp32c3.build.boot=qio -esp32c3.build.partitions=default -esp32c3.build.defines= - -## IDE 2.0 Seems to not update the value -esp32c3.menu.JTAGAdapter.default=Disabled -esp32c3.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32c3.menu.JTAGAdapter.builtin=Integrated USB JTAG -esp32c3.menu.JTAGAdapter.builtin.build.openocdscript=esp32c3-builtin.cfg -esp32c3.menu.JTAGAdapter.builtin.build.copy_jtag_files=1 -esp32c3.menu.JTAGAdapter.external=FTDI Adapter -esp32c3.menu.JTAGAdapter.external.build.openocdscript=esp32c3-ftdi.cfg -esp32c3.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32c3.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32c3.menu.JTAGAdapter.bridge.build.openocdscript=esp32c3-bridge.cfg -esp32c3.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 - -esp32c3.menu.CDCOnBoot.default=Disabled -esp32c3.menu.CDCOnBoot.default.build.cdc_on_boot=0 -esp32c3.menu.CDCOnBoot.cdc=Enabled -esp32c3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 - -esp32c3.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) -esp32c3.menu.PartitionScheme.default.build.partitions=default -esp32c3.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) -esp32c3.menu.PartitionScheme.defaultffat.build.partitions=default_ffat -esp32c3.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) -esp32c3.menu.PartitionScheme.default_8MB.build.partitions=default_8MB -esp32c3.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 -esp32c3.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) -esp32c3.menu.PartitionScheme.minimal.build.partitions=minimal -esp32c3.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) -esp32c3.menu.PartitionScheme.no_fs.build.partitions=no_fs -esp32c3.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 -esp32c3.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) -esp32c3.menu.PartitionScheme.no_ota.build.partitions=no_ota -esp32c3.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 -esp32c3.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) -esp32c3.menu.PartitionScheme.noota_3g.build.partitions=noota_3g -esp32c3.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 -esp32c3.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) -esp32c3.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat -esp32c3.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 -esp32c3.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) -esp32c3.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat -esp32c3.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 -esp32c3.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) -esp32c3.menu.PartitionScheme.huge_app.build.partitions=huge_app -esp32c3.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 -esp32c3.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) -esp32c3.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs -esp32c3.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 -esp32c3.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) -esp32c3.menu.PartitionScheme.fatflash.build.partitions=ffat -esp32c3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 -esp32c3.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) -esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB -esp32c3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 -esp32c3.menu.PartitionScheme.rainmaker=RainMaker 4MB -esp32c3.menu.PartitionScheme.rainmaker.build.partitions=rainmaker -esp32c3.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 -esp32c3.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA -esp32c3.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota -esp32c3.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 -esp32c3.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB -esp32c3.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB -esp32c3.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 -esp32c3.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs -esp32c3.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr -esp32c3.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 -esp32c3.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs -esp32c3.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB -esp32c3.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 -esp32c3.menu.PartitionScheme.custom=Custom -esp32c3.menu.PartitionScheme.custom.build.partitions= -esp32c3.menu.PartitionScheme.custom.upload.maximum_size=16777216 - -esp32c3.menu.CPUFreq.160=160MHz (WiFi) -esp32c3.menu.CPUFreq.160.build.f_cpu=160000000L -esp32c3.menu.CPUFreq.80=80MHz (WiFi) -esp32c3.menu.CPUFreq.80.build.f_cpu=80000000L -esp32c3.menu.CPUFreq.40=40MHz -esp32c3.menu.CPUFreq.40.build.f_cpu=40000000L -esp32c3.menu.CPUFreq.20=20MHz -esp32c3.menu.CPUFreq.20.build.f_cpu=20000000L -esp32c3.menu.CPUFreq.10=10MHz -esp32c3.menu.CPUFreq.10.build.f_cpu=10000000L - -esp32c3.menu.FlashMode.qio=QIO -esp32c3.menu.FlashMode.qio.build.flash_mode=dio -esp32c3.menu.FlashMode.qio.build.boot=qio -esp32c3.menu.FlashMode.dio=DIO -esp32c3.menu.FlashMode.dio.build.flash_mode=dio -esp32c3.menu.FlashMode.dio.build.boot=dio - -esp32c3.menu.FlashFreq.80=80MHz -esp32c3.menu.FlashFreq.80.build.flash_freq=80m -esp32c3.menu.FlashFreq.40=40MHz -esp32c3.menu.FlashFreq.40.build.flash_freq=40m - -esp32c3.menu.FlashSize.4M=4MB (32Mb) -esp32c3.menu.FlashSize.4M.build.flash_size=4MB -esp32c3.menu.FlashSize.8M=8MB (64Mb) -esp32c3.menu.FlashSize.8M.build.flash_size=8MB -esp32c3.menu.FlashSize.2M=2MB (16Mb) -esp32c3.menu.FlashSize.2M.build.flash_size=2MB -esp32c3.menu.FlashSize.16M=16MB (128Mb) -esp32c3.menu.FlashSize.16M.build.flash_size=16MB - -esp32c3.menu.UploadSpeed.921600=921600 -esp32c3.menu.UploadSpeed.921600.upload.speed=921600 -esp32c3.menu.UploadSpeed.115200=115200 -esp32c3.menu.UploadSpeed.115200.upload.speed=115200 -esp32c3.menu.UploadSpeed.256000.windows=256000 -esp32c3.menu.UploadSpeed.256000.upload.speed=256000 -esp32c3.menu.UploadSpeed.230400.windows.upload.speed=256000 -esp32c3.menu.UploadSpeed.230400=230400 -esp32c3.menu.UploadSpeed.230400.upload.speed=230400 -esp32c3.menu.UploadSpeed.460800.linux=460800 -esp32c3.menu.UploadSpeed.460800.macosx=460800 -esp32c3.menu.UploadSpeed.460800.upload.speed=460800 -esp32c3.menu.UploadSpeed.512000.windows=512000 -esp32c3.menu.UploadSpeed.512000.upload.speed=512000 - -esp32c3.menu.DebugLevel.none=None -esp32c3.menu.DebugLevel.none.build.code_debug=0 -esp32c3.menu.DebugLevel.error=Error -esp32c3.menu.DebugLevel.error.build.code_debug=1 -esp32c3.menu.DebugLevel.warn=Warn -esp32c3.menu.DebugLevel.warn.build.code_debug=2 -esp32c3.menu.DebugLevel.info=Info -esp32c3.menu.DebugLevel.info.build.code_debug=3 -esp32c3.menu.DebugLevel.debug=Debug -esp32c3.menu.DebugLevel.debug.build.code_debug=4 -esp32c3.menu.DebugLevel.verbose=Verbose -esp32c3.menu.DebugLevel.verbose.build.code_debug=5 - -esp32c3.menu.EraseFlash.none=Disabled -esp32c3.menu.EraseFlash.none.upload.erase_cmd= -esp32c3.menu.EraseFlash.all=Enabled -esp32c3.menu.EraseFlash.all.upload.erase_cmd=-e - -esp32c3.menu.ZigbeeMode.default=Disabled -esp32c3.menu.ZigbeeMode.default.build.zigbee_mode= -esp32c3.menu.ZigbeeMode.default.build.zigbee_libs= -esp32c3.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) -esp32c3.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR -esp32c3.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote - -############################################################## - -esp32s2.name=ESP32S2 Dev Module -esp32s2.vid.0=0x303a -esp32s2.pid.0=0x0002 -esp32s2.upload_port.vid.0=0x303a -esp32s2.upload_port.pid.0=0x0002 - -esp32s2.bootloader.tool=esptool_py -esp32s2.bootloader.tool.default=esptool_py - -esp32s2.upload.tool=esptool_py -esp32s2.upload.tool.default=esptool_py -esp32s2.upload.tool.network=esp_ota - -esp32s2.upload.maximum_size=1310720 -esp32s2.upload.maximum_data_size=327680 -esp32s2.upload.flags= -esp32s2.upload.extra_flags= -esp32s2.upload.use_1200bps_touch=false -esp32s2.upload.wait_for_upload_port=false - -esp32s2.serial.disableDTR=false -esp32s2.serial.disableRTS=false - -esp32s2.build.tarch=xtensa -esp32s2.build.bootloader_addr=0x1000 -esp32s2.build.target=esp32s2 -esp32s2.build.mcu=esp32s2 -esp32s2.build.core=esp32 -esp32s2.build.variant=esp32s2 -esp32s2.build.board=ESP32S2_DEV - -esp32s2.build.cdc_on_boot=0 -esp32s2.build.msc_on_boot=0 -esp32s2.build.dfu_on_boot=0 -esp32s2.build.f_cpu=240000000L -esp32s2.build.flash_size=4MB -esp32s2.build.flash_freq=80m -esp32s2.build.flash_mode=dio -esp32s2.build.boot=qio -esp32s2.build.partitions=default -esp32s2.build.defines= - -## IDE 2.0 Seems to not update the value -esp32s2.menu.JTAGAdapter.default=Disabled -esp32s2.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32s2.menu.JTAGAdapter.external=FTDI Adapter -esp32s2.menu.JTAGAdapter.external.build.openocdscript=esp32s2-kaluga-1.cfg -esp32s2.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32s2.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32s2.menu.JTAGAdapter.bridge.build.openocdscript=esp32s2-bridge.cfg -esp32s2.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 - -esp32s2.menu.CDCOnBoot.default=Disabled -esp32s2.menu.CDCOnBoot.default.build.cdc_on_boot=0 -esp32s2.menu.CDCOnBoot.cdc=Enabled -esp32s2.menu.CDCOnBoot.cdc.build.cdc_on_boot=1 - -esp32s2.menu.MSCOnBoot.default=Disabled -esp32s2.menu.MSCOnBoot.default.build.msc_on_boot=0 -esp32s2.menu.MSCOnBoot.msc=Enabled -esp32s2.menu.MSCOnBoot.msc.build.msc_on_boot=1 - -esp32s2.menu.DFUOnBoot.default=Disabled -esp32s2.menu.DFUOnBoot.default.build.dfu_on_boot=0 -esp32s2.menu.DFUOnBoot.dfu=Enabled -esp32s2.menu.DFUOnBoot.dfu.build.dfu_on_boot=1 - -esp32s2.menu.UploadMode.default=UART0 -esp32s2.menu.UploadMode.default.upload.use_1200bps_touch=false -esp32s2.menu.UploadMode.default.upload.wait_for_upload_port=false -esp32s2.menu.UploadMode.cdc=Internal USB -esp32s2.menu.UploadMode.cdc.upload.use_1200bps_touch=true -esp32s2.menu.UploadMode.cdc.upload.wait_for_upload_port=true - -esp32s2.menu.PSRAM.disabled=Disabled -esp32s2.menu.PSRAM.disabled.build.defines= -esp32s2.menu.PSRAM.enabled=Enabled -esp32s2.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM - -esp32s2.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) -esp32s2.menu.PartitionScheme.default.build.partitions=default -esp32s2.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) -esp32s2.menu.PartitionScheme.defaultffat.build.partitions=default_ffat -esp32s2.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) -esp32s2.menu.PartitionScheme.default_8MB.build.partitions=default_8MB -esp32s2.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 -esp32s2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) -esp32s2.menu.PartitionScheme.minimal.build.partitions=minimal -esp32s2.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) -esp32s2.menu.PartitionScheme.no_fs.build.partitions=no_fs -esp32s2.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 -esp32s2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) -esp32s2.menu.PartitionScheme.no_ota.build.partitions=no_ota -esp32s2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 -esp32s2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) -esp32s2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g -esp32s2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 -esp32s2.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) -esp32s2.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat -esp32s2.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 -esp32s2.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) -esp32s2.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat -esp32s2.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 -esp32s2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) -esp32s2.menu.PartitionScheme.huge_app.build.partitions=huge_app -esp32s2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 -esp32s2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) -esp32s2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs -esp32s2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 -esp32s2.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) -esp32s2.menu.PartitionScheme.fatflash.build.partitions=ffat -esp32s2.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 -esp32s2.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) -esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB -esp32s2.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 -esp32s2.menu.PartitionScheme.rainmaker=RainMaker 4MB -esp32s2.menu.PartitionScheme.rainmaker.build.partitions=rainmaker -esp32s2.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 -esp32s2.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA -esp32s2.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota -esp32s2.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 -esp32s2.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB -esp32s2.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB -esp32s2.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 -esp32s2.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs -esp32s2.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr -esp32s2.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 -esp32s2.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs -esp32s2.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB -esp32s2.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 -esp32s2.menu.PartitionScheme.custom=Custom -esp32s2.menu.PartitionScheme.custom.build.partitions= -esp32s2.menu.PartitionScheme.custom.upload.maximum_size=16777216 - -esp32s2.menu.CPUFreq.240=240MHz (WiFi) -esp32s2.menu.CPUFreq.240.build.f_cpu=240000000L -esp32s2.menu.CPUFreq.160=160MHz (WiFi) -esp32s2.menu.CPUFreq.160.build.f_cpu=160000000L -esp32s2.menu.CPUFreq.80=80MHz (WiFi) -esp32s2.menu.CPUFreq.80.build.f_cpu=80000000L -esp32s2.menu.CPUFreq.40=40MHz -esp32s2.menu.CPUFreq.40.build.f_cpu=40000000L -esp32s2.menu.CPUFreq.20=20MHz -esp32s2.menu.CPUFreq.20.build.f_cpu=20000000L -esp32s2.menu.CPUFreq.10=10MHz -esp32s2.menu.CPUFreq.10.build.f_cpu=10000000L - -esp32s2.menu.FlashMode.qio=QIO -esp32s2.menu.FlashMode.qio.build.flash_mode=dio -esp32s2.menu.FlashMode.qio.build.boot=qio -esp32s2.menu.FlashMode.dio=DIO -esp32s2.menu.FlashMode.dio.build.flash_mode=dio -esp32s2.menu.FlashMode.dio.build.boot=dio - -esp32s2.menu.FlashFreq.80=80MHz -esp32s2.menu.FlashFreq.80.build.flash_freq=80m -esp32s2.menu.FlashFreq.40=40MHz -esp32s2.menu.FlashFreq.40.build.flash_freq=40m - -esp32s2.menu.FlashSize.4M=4MB (32Mb) -esp32s2.menu.FlashSize.4M.build.flash_size=4MB -esp32s2.menu.FlashSize.8M=8MB (64Mb) -esp32s2.menu.FlashSize.8M.build.flash_size=8MB -esp32s2.menu.FlashSize.2M=2MB (16Mb) -esp32s2.menu.FlashSize.2M.build.flash_size=2MB -esp32s2.menu.FlashSize.16M=16MB (128Mb) -esp32s2.menu.FlashSize.16M.build.flash_size=16MB - -esp32s2.menu.UploadSpeed.921600=921600 -esp32s2.menu.UploadSpeed.921600.upload.speed=921600 -esp32s2.menu.UploadSpeed.115200=115200 -esp32s2.menu.UploadSpeed.115200.upload.speed=115200 -esp32s2.menu.UploadSpeed.256000.windows=256000 -esp32s2.menu.UploadSpeed.256000.upload.speed=256000 -esp32s2.menu.UploadSpeed.230400.windows.upload.speed=256000 -esp32s2.menu.UploadSpeed.230400=230400 -esp32s2.menu.UploadSpeed.230400.upload.speed=230400 -esp32s2.menu.UploadSpeed.460800.linux=460800 -esp32s2.menu.UploadSpeed.460800.macosx=460800 -esp32s2.menu.UploadSpeed.460800.upload.speed=460800 -esp32s2.menu.UploadSpeed.512000.windows=512000 -esp32s2.menu.UploadSpeed.512000.upload.speed=512000 - -esp32s2.menu.DebugLevel.none=None -esp32s2.menu.DebugLevel.none.build.code_debug=0 -esp32s2.menu.DebugLevel.error=Error -esp32s2.menu.DebugLevel.error.build.code_debug=1 -esp32s2.menu.DebugLevel.warn=Warn -esp32s2.menu.DebugLevel.warn.build.code_debug=2 -esp32s2.menu.DebugLevel.info=Info -esp32s2.menu.DebugLevel.info.build.code_debug=3 -esp32s2.menu.DebugLevel.debug=Debug -esp32s2.menu.DebugLevel.debug.build.code_debug=4 -esp32s2.menu.DebugLevel.verbose=Verbose -esp32s2.menu.DebugLevel.verbose.build.code_debug=5 - -esp32s2.menu.EraseFlash.none=Disabled -esp32s2.menu.EraseFlash.none.upload.erase_cmd= -esp32s2.menu.EraseFlash.all=Enabled -esp32s2.menu.EraseFlash.all.upload.erase_cmd=-e - -esp32s2.menu.ZigbeeMode.default=Disabled -esp32s2.menu.ZigbeeMode.default.build.zigbee_mode= -esp32s2.menu.ZigbeeMode.default.build.zigbee_libs= -esp32s2.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) -esp32s2.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR -esp32s2.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote - -############################################################## - -esp32.name=ESP32 Dev Module - -esp32.bootloader.tool=esptool_py -esp32.bootloader.tool.default=esptool_py - -esp32.upload.tool=esptool_py -esp32.upload.tool.default=esptool_py -esp32.upload.tool.network=esp_ota - -esp32.upload.maximum_size=1310720 -esp32.upload.maximum_data_size=327680 -esp32.upload.flags= -esp32.upload.extra_flags= - -esp32.serial.disableDTR=true -esp32.serial.disableRTS=true - -esp32.build.tarch=xtensa -esp32.build.bootloader_addr=0x1000 -esp32.build.target=esp32 -esp32.build.mcu=esp32 -esp32.build.core=esp32 -esp32.build.variant=esp32 -esp32.build.board=ESP32_DEV - -esp32.build.f_cpu=240000000L -esp32.build.flash_size=4MB -esp32.build.flash_freq=40m -esp32.build.flash_mode=dio -esp32.build.boot=dio -esp32.build.partitions=default -esp32.build.defines= -esp32.build.loop_core= -esp32.build.event_core= - -## IDE 2.0 Seems to not update the value -esp32.menu.JTAGAdapter.default=Disabled -esp32.menu.JTAGAdapter.default.build.copy_jtag_files=0 -esp32.menu.JTAGAdapter.external=FTDI Adapter -esp32.menu.JTAGAdapter.external.build.openocdscript=esp32-wrover-kit-3.3v.cfg -esp32.menu.JTAGAdapter.external.build.copy_jtag_files=1 -esp32.menu.JTAGAdapter.bridge=ESP USB Bridge -esp32.menu.JTAGAdapter.bridge.build.openocdscript=esp32-bridge.cfg -esp32.menu.JTAGAdapter.bridge.build.copy_jtag_files=1 - -esp32.menu.PSRAM.disabled=Disabled -esp32.menu.PSRAM.disabled.build.defines= -esp32.menu.PSRAM.disabled.build.extra_libs= -esp32.menu.PSRAM.enabled=Enabled -esp32.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw -esp32.menu.PSRAM.enabled.build.extra_libs= - -esp32.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) -esp32.menu.PartitionScheme.default.build.partitions=default -esp32.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) -esp32.menu.PartitionScheme.defaultffat.build.partitions=default_ffat -esp32.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) -esp32.menu.PartitionScheme.default_8MB.build.partitions=default_8MB -esp32.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 -esp32.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) -esp32.menu.PartitionScheme.minimal.build.partitions=minimal -esp32.menu.PartitionScheme.no_fs=No FS 4MB (2MB APP x2) -esp32.menu.PartitionScheme.no_fs.build.partitions=no_fs -esp32.menu.PartitionScheme.no_fs.upload.maximum_size=2031616 -esp32.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) -esp32.menu.PartitionScheme.no_ota.build.partitions=no_ota -esp32.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 -esp32.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) -esp32.menu.PartitionScheme.noota_3g.build.partitions=noota_3g -esp32.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 -esp32.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) -esp32.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat -esp32.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 -esp32.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) -esp32.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat -esp32.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 -esp32.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) -esp32.menu.PartitionScheme.huge_app.build.partitions=huge_app -esp32.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 -esp32.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) -esp32.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs -esp32.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 -esp32.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) -esp32.menu.PartitionScheme.fatflash.build.partitions=ffat -esp32.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 -esp32.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) -esp32.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB -esp32.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 -esp32.menu.PartitionScheme.rainmaker=RainMaker 4MB -esp32.menu.PartitionScheme.rainmaker.build.partitions=rainmaker -esp32.menu.PartitionScheme.rainmaker.upload.maximum_size=1966080 -esp32.menu.PartitionScheme.rainmaker_4MB=RainMaker 4MB No OTA -esp32.menu.PartitionScheme.rainmaker_4MB.build.partitions=rainmaker_4MB_no_ota -esp32.menu.PartitionScheme.rainmaker_4MB.upload.maximum_size=4038656 -esp32.menu.PartitionScheme.rainmaker_8MB=RainMaker 8MB -esp32.menu.PartitionScheme.rainmaker_8MB.build.partitions=rainmaker_8MB -esp32.menu.PartitionScheme.rainmaker_8MB.upload.maximum_size=4096000 -esp32.menu.PartitionScheme.zigbee_zczr=Zigbee ZCZR 4MB with spiffs -esp32.menu.PartitionScheme.zigbee_zczr.build.partitions=zigbee_zczr -esp32.menu.PartitionScheme.zigbee_zczr.upload.maximum_size=1310720 -esp32.menu.PartitionScheme.zigbee_zczr_8MB=Zigbee ZCZR 8MB with spiffs -esp32.menu.PartitionScheme.zigbee_zczr_8MB.build.partitions=zigbee_zczr_8MB -esp32.menu.PartitionScheme.zigbee_zczr_8MB.upload.maximum_size=3407872 -esp32.menu.PartitionScheme.custom=Custom -esp32.menu.PartitionScheme.custom.build.partitions= -esp32.menu.PartitionScheme.custom.upload.maximum_size=16777216 - -esp32.menu.CPUFreq.240=240MHz (WiFi/BT) -esp32.menu.CPUFreq.240.build.f_cpu=240000000L -esp32.menu.CPUFreq.160=160MHz (WiFi/BT) -esp32.menu.CPUFreq.160.build.f_cpu=160000000L -esp32.menu.CPUFreq.80=80MHz (WiFi/BT) -esp32.menu.CPUFreq.80.build.f_cpu=80000000L -esp32.menu.CPUFreq.40=40MHz (40MHz XTAL) -esp32.menu.CPUFreq.40.build.f_cpu=40000000L -esp32.menu.CPUFreq.26=26MHz (26MHz XTAL) -esp32.menu.CPUFreq.26.build.f_cpu=26000000L -esp32.menu.CPUFreq.20=20MHz (40MHz XTAL) -esp32.menu.CPUFreq.20.build.f_cpu=20000000L -esp32.menu.CPUFreq.13=13MHz (26MHz XTAL) -esp32.menu.CPUFreq.13.build.f_cpu=13000000L -esp32.menu.CPUFreq.10=10MHz (40MHz XTAL) -esp32.menu.CPUFreq.10.build.f_cpu=10000000L - -esp32.menu.FlashMode.qio=QIO -esp32.menu.FlashMode.qio.build.flash_mode=dio -esp32.menu.FlashMode.qio.build.boot=qio -esp32.menu.FlashMode.dio=DIO -esp32.menu.FlashMode.dio.build.flash_mode=dio -esp32.menu.FlashMode.dio.build.boot=dio - -esp32.menu.FlashFreq.80=80MHz -esp32.menu.FlashFreq.80.build.flash_freq=80m -esp32.menu.FlashFreq.40=40MHz -esp32.menu.FlashFreq.40.build.flash_freq=40m - -esp32.menu.FlashSize.4M=4MB (32Mb) -esp32.menu.FlashSize.4M.build.flash_size=4MB -esp32.menu.FlashSize.8M=8MB (64Mb) -esp32.menu.FlashSize.8M.build.flash_size=8MB -esp32.menu.FlashSize.2M=2MB (16Mb) -esp32.menu.FlashSize.2M.build.flash_size=2MB -esp32.menu.FlashSize.16M=16MB (128Mb) -esp32.menu.FlashSize.16M.build.flash_size=16MB - -esp32.menu.UploadSpeed.921600=921600 -esp32.menu.UploadSpeed.921600.upload.speed=921600 -esp32.menu.UploadSpeed.115200=115200 -esp32.menu.UploadSpeed.115200.upload.speed=115200 -esp32.menu.UploadSpeed.256000.windows=256000 -esp32.menu.UploadSpeed.256000.upload.speed=256000 -esp32.menu.UploadSpeed.230400.windows.upload.speed=256000 -esp32.menu.UploadSpeed.230400=230400 -esp32.menu.UploadSpeed.230400.upload.speed=230400 -esp32.menu.UploadSpeed.460800.linux=460800 -esp32.menu.UploadSpeed.460800.macosx=460800 -esp32.menu.UploadSpeed.460800.upload.speed=460800 -esp32.menu.UploadSpeed.512000.windows=512000 -esp32.menu.UploadSpeed.512000.upload.speed=512000 - -esp32.menu.LoopCore.1=Core 1 -esp32.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1 -esp32.menu.LoopCore.0=Core 0 -esp32.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0 - -esp32.menu.EventsCore.1=Core 1 -esp32.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1 -esp32.menu.EventsCore.0=Core 0 -esp32.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0 - -esp32.menu.DebugLevel.none=None -esp32.menu.DebugLevel.none.build.code_debug=0 -esp32.menu.DebugLevel.error=Error -esp32.menu.DebugLevel.error.build.code_debug=1 -esp32.menu.DebugLevel.warn=Warn -esp32.menu.DebugLevel.warn.build.code_debug=2 -esp32.menu.DebugLevel.info=Info -esp32.menu.DebugLevel.info.build.code_debug=3 -esp32.menu.DebugLevel.debug=Debug -esp32.menu.DebugLevel.debug.build.code_debug=4 -esp32.menu.DebugLevel.verbose=Verbose -esp32.menu.DebugLevel.verbose.build.code_debug=5 - -esp32.menu.EraseFlash.none=Disabled -esp32.menu.EraseFlash.none.upload.erase_cmd= -esp32.menu.EraseFlash.all=Enabled -esp32.menu.EraseFlash.all.upload.erase_cmd=-e - -esp32.menu.ZigbeeMode.default=Disabled -esp32.menu.ZigbeeMode.default.build.zigbee_mode= -esp32.menu.ZigbeeMode.default.build.zigbee_libs= -esp32.menu.ZigbeeMode.zczr=Zigbee ZCZR (coordinator/router) -esp32.menu.ZigbeeMode.zczr.build.zigbee_mode=-DZIGBEE_MODE_ZCZR -esp32.menu.ZigbeeMode.zczr.build.zigbee_libs=-lesp_zb_api.zczr -lzboss_stack.zczr -lzboss_port.remote - -############################################################## - esp32da.name=ESP32-WROOM-DA Module esp32da.bootloader.tool=esptool_py diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp index 5f5a7a353e8..55fd27f0b63 100644 --- a/cores/esp32/Esp.cpp +++ b/cores/esp32/Esp.cpp @@ -57,32 +57,35 @@ extern "C" { #include "esp32/rom/spi_flash.h" #include "soc/efuse_reg.h" #define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing flash size and spi mode -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/spi_flash.h" -#include "soc/efuse_reg.h" -#define ESP_FLASH_IMAGE_BASE 0x1000 -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/spi_flash.h" -#include "soc/efuse_reg.h" -#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000 #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/spi_flash.h" #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000 #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/spi_flash.h" #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000 +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/spi_flash.h" +#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32c5 is located at 0x2000 #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/spi_flash.h" #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c6 is located at 0x0000 +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/spi_flash.h" +#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c61 is located at 0x0000 #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/spi_flash.h" #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000 #elif CONFIG_IDF_TARGET_ESP32P4 #include "esp32p4/rom/spi_flash.h" #define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000 -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/spi_flash.h" -#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32c5 is located at 0x2000 +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/spi_flash.h" +#include "soc/efuse_reg.h" +#define ESP_FLASH_IMAGE_BASE 0x1000 +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/spi_flash.h" +#include "soc/efuse_reg.h" +#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000 #else #error Target CONFIG_IDF_TARGET is not supported #endif @@ -365,7 +368,7 @@ uint32_t EspClass::getFlashChipSpeed(void) { } FlashMode_t EspClass::getFlashChipMode(void) { -#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 +#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL); #elif CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 uint32_t spi_ctrl = REG_READ(DR_REG_SPI0_BASE + 0x8); @@ -449,6 +452,22 @@ uint32_t EspClass::magicFlashChipSpeed(uint8_t flashByte) { return 0; } +#elif CONFIG_IDF_TARGET_ESP32C61 + /* + FLASH_FREQUENCY = { + "80m": 0xF, + "40m": 0x0, + "20m": 0x2, + } +*/ + switch (flashByte & 0x0F) { + case 0xF: return (80_MHz); + case 0x0: return (40_MHz); + case 0x2: return (20_MHz); + default: // fail? + return 0; + } + #elif CONFIG_IDF_TARGET_ESP32H2 /* diff --git a/cores/esp32/HardwareSerial.h b/cores/esp32/HardwareSerial.h index 9a4eec5ccb4..08e719d9036 100644 --- a/cores/esp32/HardwareSerial.h +++ b/cores/esp32/HardwareSerial.h @@ -150,40 +150,42 @@ typedef enum { #ifndef SOC_RX0 #if CONFIG_IDF_TARGET_ESP32 #define SOC_RX0 (gpio_num_t)3 -#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 -#define SOC_RX0 (gpio_num_t)44 #elif CONFIG_IDF_TARGET_ESP32C2 #define SOC_RX0 (gpio_num_t)19 #elif CONFIG_IDF_TARGET_ESP32C3 #define SOC_RX0 (gpio_num_t)20 +#elif CONFIG_IDF_TARGET_ESP32C5 +#define SOC_RX0 (gpio_num_t)12 #elif CONFIG_IDF_TARGET_ESP32C6 #define SOC_RX0 (gpio_num_t)17 +#elif CONFIG_IDF_TARGET_ESP32C61 +#define SOC_RX0 (gpio_num_t)10 #elif CONFIG_IDF_TARGET_ESP32H2 #define SOC_RX0 (gpio_num_t)23 #elif CONFIG_IDF_TARGET_ESP32P4 #define SOC_RX0 (gpio_num_t)38 -#elif CONFIG_IDF_TARGET_ESP32C5 -#define SOC_RX0 (gpio_num_t)12 +#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 +#define SOC_RX0 (gpio_num_t)44 #endif #endif #ifndef SOC_TX0 #if CONFIG_IDF_TARGET_ESP32 #define SOC_TX0 (gpio_num_t)1 -#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 -#define SOC_TX0 (gpio_num_t)43 #elif CONFIG_IDF_TARGET_ESP32C2 #define SOC_TX0 (gpio_num_t)20 #elif CONFIG_IDF_TARGET_ESP32C3 #define SOC_TX0 (gpio_num_t)21 +#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 +#define SOC_TX0 (gpio_num_t)11 #elif CONFIG_IDF_TARGET_ESP32C6 #define SOC_TX0 (gpio_num_t)16 #elif CONFIG_IDF_TARGET_ESP32H2 #define SOC_TX0 (gpio_num_t)24 #elif CONFIG_IDF_TARGET_ESP32P4 #define SOC_TX0 (gpio_num_t)37 -#elif CONFIG_IDF_TARGET_ESP32C5 -#define SOC_TX0 (gpio_num_t)11 +#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 +#define SOC_TX0 (gpio_num_t)43 #endif #endif @@ -193,44 +195,40 @@ typedef enum { #ifndef RX1 #if CONFIG_IDF_TARGET_ESP32 #define RX1 (gpio_num_t)26 -#elif CONFIG_IDF_TARGET_ESP32S2 -#define RX1 (gpio_num_t)4 #elif CONFIG_IDF_TARGET_ESP32C2 #define RX1 (gpio_num_t)10 #elif CONFIG_IDF_TARGET_ESP32C3 #define RX1 (gpio_num_t)18 -#elif CONFIG_IDF_TARGET_ESP32S3 -#define RX1 (gpio_num_t)15 -#elif CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 #define RX1 (gpio_num_t)4 +#elif CONFIG_IDF_TARGET_ESP32C61 +#define RX1 (gpio_num_t)8 #elif CONFIG_IDF_TARGET_ESP32H2 #define RX1 (gpio_num_t)0 #elif CONFIG_IDF_TARGET_ESP32P4 #define RX1 (gpio_num_t)11 -#elif CONFIG_IDF_TARGET_ESP32C5 -#define RX1 (gpio_num_t)4 +#elif CONFIG_IDF_TARGET_ESP32S3 +#define RX1 (gpio_num_t)15 #endif #endif #ifndef TX1 #if CONFIG_IDF_TARGET_ESP32 #define TX1 (gpio_num_t)27 -#elif CONFIG_IDF_TARGET_ESP32S2 -#define TX1 (gpio_num_t)5 #elif CONFIG_IDF_TARGET_ESP32C2 #define TX1 (gpio_num_t)18 #elif CONFIG_IDF_TARGET_ESP32C3 #define TX1 (gpio_num_t)19 -#elif CONFIG_IDF_TARGET_ESP32S3 -#define TX1 (gpio_num_t)16 -#elif CONFIG_IDF_TARGET_ESP32C6 +#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 #define TX1 (gpio_num_t)5 +#elif CONFIG_IDF_TARGET_ESP32C61 +#define TX1 (gpio_num_t)29 #elif CONFIG_IDF_TARGET_ESP32H2 #define TX1 (gpio_num_t)1 #elif CONFIG_IDF_TARGET_ESP32P4 #define TX1 (gpio_num_t)10 -#elif CONFIG_IDF_TARGET_ESP32C5 -#define TX1 (gpio_num_t)5 +#elif CONFIG_IDF_TARGET_ESP32S3 +#define TX1 (gpio_num_t)16 #endif #endif #endif /* SOC_UART_HP_NUM > 1 */ diff --git a/cores/esp32/chip-debug-report.cpp b/cores/esp32/chip-debug-report.cpp index 753e7346775..f4f29a1e005 100644 --- a/cores/esp32/chip-debug-report.cpp +++ b/cores/esp32/chip-debug-report.cpp @@ -69,9 +69,8 @@ static void printPkgVersion(void) { #elif CONFIG_IDF_TARGET_ESP32P4 uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SYS_2_REG, EFUSE_PKG_VERSION); chip_report_printf("%lu", pkg_ver); -#elif CONFIG_IDF_TARGET_ESP32C5 - // ToDo: Update this line when EFUSE_PKG_VERSION is available again for ESP32-C5 - uint32_t pkg_ver = 0; //REG_GET_FIELD(EFUSE_RD_MAC_SYS2_REG, EFUSE_PKG_VERSION); +#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 + uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SYS2_REG, EFUSE_PKG_VERSION); chip_report_printf("%lu", pkg_ver); #else chip_report_printf("Unknown"); diff --git a/cores/esp32/esp32-hal-cpu.c b/cores/esp32/esp32-hal-cpu.c index e9113da4219..57d1b1da82f 100644 --- a/cores/esp32/esp32-hal-cpu.c +++ b/cores/esp32/esp32-hal-cpu.c @@ -19,8 +19,7 @@ #include "esp_attr.h" #include "esp_log.h" #include "soc/rtc.h" -#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) \ - && !defined(CONFIG_IDF_TARGET_ESP32C5) +#if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C3) #include "soc/rtc_cntl_reg.h" #include "soc/syscon_reg.h" #endif @@ -29,36 +28,108 @@ #include "esp32-hal-cpu.h" #include "hal/timer_ll.h" #include "esp_private/systimer.h" - #include "esp_system.h" -#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+ + #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4 #include "xtensa_timer.h" #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "xtensa_timer.h" -#include "esp32s2/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "xtensa_timer.h" -#include "esp32s3/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "8.5M", + "APLL" +}; + #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "17.5M" +}; + #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "17.5M" +}; + +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "17.5M", + "PLL_F160M", + "PLL_F240M" +}; + #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "17.5M" +}; + +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "17.5M", + "PLL_F160M" +}; + #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "8.5M", + "FLASH_PLL" +}; + #elif CONFIG_IDF_TARGET_ESP32P4 #include "esp32p4/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "CPLL", + "17.5M" +}; + +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "xtensa_timer.h" +#include "esp32s2/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "8.5M", + "APLL" +}; + +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "xtensa_timer.h" +#include "esp32s3/rom/rtc.h" + +static const char *clock_source_names[] = { + "XTAL", + "PLL", + "17.5M" +}; + #else #error Target CONFIG_IDF_TARGET is not supported #endif -#else // ESP32 Before IDF 4.0 -#include "rom/rtc.h" -#endif typedef struct apb_change_cb_s { struct apb_change_cb_s *prev; @@ -182,77 +253,101 @@ static uint32_t calculateApb(rtc_cpu_freq_config_t *conf) { void esp_timer_impl_update_apb_freq(uint32_t apb_ticks_per_us); //private in IDF #endif -bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) { - rtc_cpu_freq_config_t conf, cconf; - uint32_t capb, apb; - //Get XTAL Frequency and calculate min CPU MHz -#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) && !defined(CONFIG_IDF_TARGET_ESP32C5)) - rtc_xtal_freq_t xtal = rtc_clk_xtal_freq_get(); -#endif -#if CONFIG_IDF_TARGET_ESP32 - if (xtal > RTC_XTAL_FREQ_AUTO) { - if (xtal < RTC_XTAL_FREQ_40M) { - if (cpu_freq_mhz <= xtal && cpu_freq_mhz != xtal && cpu_freq_mhz != (xtal / 2)) { - log_e("Bad frequency: %u MHz! Options are: 240, 160, 80, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2); - return false; - } - } else if (cpu_freq_mhz <= xtal && cpu_freq_mhz != xtal && cpu_freq_mhz != (xtal / 2) && cpu_freq_mhz != (xtal / 4)) { - log_e("Bad frequency: %u MHz! Options are: 240, 160, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2, xtal / 4); - return false; - } +const char *getClockSourceName(uint8_t source) { + if (source < SOC_CPU_CLK_SRC_INVALID) { + return clock_source_names[source]; } + + return "Invalid"; +} + +const char *getSupportedCpuFrequencyMhz(uint8_t xtal) { + char *supported_frequencies = (char *)calloc(256, sizeof(char)); + int pos = 0; + +#if TARGET_CPU_FREQ_MAX_400 + // P4 does not support 400MHz yet + pos += snprintf(supported_frequencies + pos, 256 - pos, "360"); +#elif TARGET_CPU_FREQ_MAX_240 +#if CONFIG_IDF_TARGET_ESP32 + if (!REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) || !REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) { + pos += snprintf(supported_frequencies + pos, 256 - pos, "160, 80"); + } else #endif -#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) && !defined(CONFIG_IDF_TARGET_ESP32C5)) - if (cpu_freq_mhz > xtal && cpu_freq_mhz != 240 && cpu_freq_mhz != 160 && cpu_freq_mhz != 120 && cpu_freq_mhz != 80) { - if (xtal >= RTC_XTAL_FREQ_40M) { - log_e("Bad frequency: %u MHz! Options are: 240, 160, 120, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2, xtal / 4); - } else { - log_e("Bad frequency: %u MHz! Options are: 240, 160, 120, 80, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2); - } - return false; + { + pos += snprintf(supported_frequencies + pos, 256 - pos, "240, 160, 80"); } +#elif TARGET_CPU_FREQ_MAX_160 + pos += snprintf(supported_frequencies + pos, 256 - pos, "160, 120, 80"); +#elif TARGET_CPU_FREQ_MAX_120 + pos += snprintf(supported_frequencies + pos, 256 - pos, "120, 80"); +#elif TARGET_CPU_FREQ_MAX_96 + pos += snprintf(supported_frequencies + pos, 256 - pos, "96, 64, 48"); +#else + free(supported_frequencies); + return "Unknown"; #endif + + // Append xtal and its dividers only if xtal is nonzero + if (xtal != 0) { + // We'll show as: , , [, ] MHz + pos += snprintf(supported_frequencies + pos, 256 - pos, ", %u, %u", xtal, xtal / 2); + #if CONFIG_IDF_TARGET_ESP32 - //check if cpu supports the frequency - if (cpu_freq_mhz == 240) { - //Check if ESP32 is rated for a CPU frequency of 160MHz only - if (REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_RATED) && REG_GET_BIT(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_CPU_FREQ_LOW)) { - log_e("Can not switch to 240 MHz! Chip CPU frequency rated for 160MHz."); - cpu_freq_mhz = 160; + // Only append xtal/4 if it's > 0 and meaningful for higher-frequency chips (e.g., ESP32 40MHz/4=10) + if (xtal >= RTC_XTAL_FREQ_40M) { + pos += snprintf(supported_frequencies + pos, 256 - pos, ", %u", xtal / 4); } - } #endif - //Get current CPU clock configuration + } + + pos += snprintf(supported_frequencies + pos, 256 - pos, " MHz"); + return supported_frequencies; +} + +bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) { + rtc_cpu_freq_config_t conf, cconf; + uint32_t capb, apb; + [[maybe_unused]] uint8_t xtal = 0; + + // ===== Get XTAL Frequency and validate input ===== +//#if TARGET_HAS_XTAL_FREQ + xtal = (uint8_t)rtc_clk_xtal_freq_get(); +//#endif + + // ===== Get current configuration and check if change is needed ===== rtc_clk_cpu_freq_get_config(&cconf); - //return if frequency has not changed if (cconf.freq_mhz == cpu_freq_mhz) { - return true; + return true; // Frequency already set } - //Get configuration for the new CPU frequency + + // ===== Get configuration for new frequency ===== if (!rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &conf)) { - log_e("CPU clock could not be set to %u MHz", cpu_freq_mhz); + log_e("CPU clock could not be set to %u MHz. Supported frequencies: %s", cpu_freq_mhz, getSupportedCpuFrequencyMhz(xtal)); return false; } - //Current APB + + // ===== Calculate APB frequencies ===== capb = calculateApb(&cconf); - //New APB apb = calculateApb(&conf); - //Call peripheral functions before the APB change + // ===== Apply frequency change ===== if (apb_change_callbacks) { triggerApbChangeCallback(APB_BEFORE_CHANGE, capb, apb); } - //Make the frequency change + rtc_clk_cpu_freq_set_config_fast(&conf); -#if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C3) + + // Update APB frequency for targets with dynamic APB +#if TARGET_HAS_DYNAMIC_APB if (capb != apb) { - //Update REF_TICK (uncomment if REF_TICK is different than 1MHz) - //if(conf.freq_mhz < 80){ - // ESP_REG(APB_CTRL_XTAL_TICK_CONF_REG) = conf.freq_mhz / (REF_CLK_FREQ / MHZ) - 1; + // Update REF_TICK (uncomment if REF_TICK is different than 1MHz) + // if (conf.freq_mhz < 80) { + // ESP_REG(APB_CTRL_XTAL_TICK_CONF_REG) = conf.freq_mhz / (REF_CLK_FREQ / MHZ) - 1; // } - //Update APB Freq REG rtc_clk_apb_freq_update(apb); - //Update esp_timer divisor + + // ESP32-specific: Update esp_timer divisor #if CONFIG_IDF_TARGET_ESP32 #if defined(LACT_MODULE) && defined(LACT_TICKS_PER_US) timer_ll_set_lact_clock_prescale(TIMER_LL_GET_HW(LACT_MODULE), apb / MHZ / LACT_TICKS_PER_US); @@ -262,34 +357,20 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) { #endif } #endif - //Update FreeRTOS Tick Divisor -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 + // Update FreeRTOS Tick Divisor for Xtensa targets +#if TARGET_HAS_XTENSA_TICK uint32_t fcpu = (conf.freq_mhz >= 80) ? (conf.freq_mhz * MHZ) : (apb); _xt_tick_divisor = fcpu / XT_TICK_PER_SEC; #endif - //Call peripheral functions after the APB change + if (apb_change_callbacks) { triggerApbChangeCallback(APB_AFTER_CHANGE, capb, apb); } -#if defined(SOC_CLK_APLL_SUPPORTED) && !defined(CONFIG_IDF_TARGET_ESP32P4) // APLL not yet supported in ESP32-P4 - log_d( - "%s: %u / %u = %u Mhz, APB: %u Hz", - (conf.source == SOC_CPU_CLK_SRC_PLL) ? "PLL" : ((conf.source == SOC_CPU_CLK_SRC_APLL) ? "APLL" : ((conf.source == SOC_CPU_CLK_SRC_XTAL) ? "XTAL" : "8M")), - conf.source_freq_mhz, conf.div, conf.freq_mhz, apb - ); -#elif defined(CONFIG_IDF_TARGET_ESP32C5) - log_d( - "%s: %u / %u = %u Mhz, APB: %u Hz", - (conf.source == SOC_CPU_CLK_SRC_PLL_F240M || conf.source == SOC_CPU_CLK_SRC_PLL_F160M) ? "PLL" : ((conf.source == SOC_CPU_CLK_SRC_XTAL) ? "XTAL" : "8M"), - conf.source_freq_mhz, conf.div, conf.freq_mhz, apb - ); -#else - log_d( - "%s: %u / %u = %u Mhz, APB: %u Hz", (conf.source == SOC_CPU_CLK_SRC_PLL) ? "PLL" : ((conf.source == SOC_CPU_CLK_SRC_XTAL) ? "XTAL" : "17.5M"), - conf.source_freq_mhz, conf.div, conf.freq_mhz, apb - ); -#endif + + // ===== Debug logging ===== + log_d("%s: %u / %u = %u Mhz, APB: %u Hz", getClockSourceName(conf.source), conf.source_freq_mhz, conf.div, conf.freq_mhz, apb); + return true; } diff --git a/cores/esp32/esp32-hal-cpu.h b/cores/esp32/esp32-hal-cpu.h index 59806b460ae..dfae10678a1 100644 --- a/cores/esp32/esp32-hal-cpu.h +++ b/cores/esp32/esp32-hal-cpu.h @@ -23,6 +23,72 @@ extern "C" { #include #include +#include "sdkconfig.h" +#include "soc/soc_caps.h" + +// When adding a new target, update the appropriate group(s) below + +// Targets that support XTAL frequency queries via rtc_clk_xtal_freq_get() +#if (!defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32P4)) +#define TARGET_HAS_XTAL_FREQ 1 +#else +#define TARGET_HAS_XTAL_FREQ 0 +#endif + +// Targets that need dynamic APB frequency updates via rtc_clk_apb_freq_update() +#if (defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C3)) +#define TARGET_HAS_DYNAMIC_APB 1 +#else +#define TARGET_HAS_DYNAMIC_APB 0 +#endif + +// Xtensa architecture targets that need FreeRTOS tick divisor updates +#if (defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32S2)) +#define TARGET_HAS_XTENSA_TICK 1 +#else +#define TARGET_HAS_XTENSA_TICK 0 +#endif + +// Targets with APLL support (uses IDF SOC capability macro) +// Note: ESP32-P4 APLL support is not yet fully implemented in IDF +#if (defined(SOC_CLK_APLL_SUPPORTED) && !defined(CONFIG_IDF_TARGET_ESP32P4)) +#define TARGET_HAS_APLL 1 +#else +#define TARGET_HAS_APLL 0 +#endif + +// Targets grouped by maximum CPU frequency support + +#if (defined(CONFIG_IDF_TARGET_ESP32P4)) +#define TARGET_CPU_FREQ_MAX_400 1 +#else +#define TARGET_CPU_FREQ_MAX_400 0 +#endif + +#if (defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3)) +#define TARGET_CPU_FREQ_MAX_240 1 +#else +#define TARGET_CPU_FREQ_MAX_240 0 +#endif + +#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)) +#define TARGET_CPU_FREQ_MAX_160 1 +#else +#define TARGET_CPU_FREQ_MAX_160 0 +#endif + +#if (defined(CONFIG_IDF_TARGET_ESP32C2)) +#define TARGET_CPU_FREQ_MAX_120 1 +#else +#define TARGET_CPU_FREQ_MAX_120 0 +#endif + +#if (defined(CONFIG_IDF_TARGET_ESP32H2)) +#define TARGET_CPU_FREQ_MAX_96 1 +#else +#define TARGET_CPU_FREQ_MAX_96 0 +#endif + typedef enum { APB_BEFORE_CHANGE, APB_AFTER_CHANGE @@ -40,6 +106,8 @@ bool removeApbChangeCallback(void *arg, apb_change_cb_t cb); // 24, 12 <<< For 24MHz XTAL bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz); +const char *getSupportedCpuFrequencyMhz(uint8_t xtal); +const char *getClockSourceName(uint8_t source); uint32_t getCpuFrequencyMhz(); // In MHz uint32_t getXtalFrequencyMhz(); // In MHz uint32_t getApbFrequency(); // In Hz diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 197f789d94d..1b0f21a338d 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -131,7 +131,11 @@ extern void ARDUINO_ISR_ATTR __pinMode(uint8_t pin, uint8_t mode) { .mode = GPIO_MODE_DISABLE, /*!< GPIO mode: set input/output mode */ .pull_up_en = GPIO_PULLUP_DISABLE, /*!< GPIO pull-up */ .pull_down_en = GPIO_PULLDOWN_DISABLE, /*!< GPIO pull-down */ +#ifndef CONFIG_IDF_TARGET_ESP32C61 .intr_type = gpiohal.dev->pin[pin].int_type /*!< GPIO interrupt type - previously set */ +#else + .intr_type = gpiohal.dev->pinn[pin].pinn_int_type /*!< GPIO interrupt type - previously set */ +#endif }; if (mode < 0x20) { //io conf.mode = mode & (INPUT | OUTPUT); diff --git a/cores/esp32/esp32-hal-i2c-slave.c b/cores/esp32/esp32-hal-i2c-slave.c index 1f23b7832f7..9589995c2c3 100644 --- a/cores/esp32/esp32-hal-i2c-slave.c +++ b/cores/esp32/esp32-hal-i2c-slave.c @@ -44,7 +44,7 @@ #include "soc/periph_defs.h" #include "hal/i2c_ll.h" #include "hal/i2c_types.h" -#ifndef CONFIG_IDF_TARGET_ESP32C5 +#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C61) #include "hal/clk_gate_ll.h" #endif #include "esp32-hal-log.h" @@ -328,7 +328,13 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t frequency = 100000L; } frequency = (frequency * 5) / 4; -#if !defined(CONFIG_IDF_TARGET_ESP32P4) && !defined(CONFIG_IDF_TARGET_ESP32C5) +#if CONFIG_IDF_TARGET_ESP32 || \ + CONFIG_IDF_TARGET_ESP32C2 || \ + CONFIG_IDF_TARGET_ESP32C3 || \ + CONFIG_IDF_TARGET_ESP32C6 || \ + CONFIG_IDF_TARGET_ESP32H2 || \ + CONFIG_IDF_TARGET_ESP32S2 || \ + CONFIG_IDF_TARGET_ESP32S3 if (i2c->num == 0) { periph_ll_enable_clk_clear_rst(PERIPH_I2C0_MODULE); #if SOC_HP_I2C_NUM > 1 diff --git a/cores/esp32/esp32-hal-matrix.c b/cores/esp32/esp32-hal-matrix.c index 0d81e979f2b..f990d984380 100644 --- a/cores/esp32/esp32-hal-matrix.c +++ b/cores/esp32/esp32-hal-matrix.c @@ -20,22 +20,24 @@ #include "soc/gpio_pins.h" #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4 #include "esp32/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32P4 #include "esp32p4/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/gpio.h" #else #error Target CONFIG_IDF_TARGET is not supported #endif diff --git a/cores/esp32/esp32-hal-misc.c b/cores/esp32/esp32-hal-misc.c index 41e2cf71543..849853e0959 100644 --- a/cores/esp32/esp32-hal-misc.c +++ b/cores/esp32/esp32-hal-misc.c @@ -30,8 +30,7 @@ #endif #include #include "soc/rtc.h" -#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) \ - && !defined(CONFIG_IDF_TARGET_ESP32C5) +#if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) #include "soc/rtc_cntl_reg.h" #include "soc/syscon_reg.h" #endif @@ -43,22 +42,24 @@ #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4 #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32P4 #include "esp32p4/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/rtc.h" #else #error Target CONFIG_IDF_TARGET is not supported diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c index 0555dfae095..b0789297d17 100644 --- a/cores/esp32/esp32-hal-spi.c +++ b/cores/esp32/esp32-hal-spi.c @@ -26,7 +26,7 @@ #include "soc/io_mux_reg.h" #include "soc/gpio_sig_map.h" #include "soc/rtc.h" -#ifndef CONFIG_IDF_TARGET_ESP32C5 +#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C61) #include "hal/clk_gate_ll.h" #endif #include "esp32-hal-periman.h" @@ -39,23 +39,21 @@ #include "soc/dport_reg.h" #include "esp32/rom/ets_sys.h" #include "esp32/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "soc/dport_reg.h" -#include "esp32s2/rom/ets_sys.h" -#include "esp32s2/rom/gpio.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "soc/dport_reg.h" -#include "esp32s3/rom/ets_sys.h" -#include "esp32s3/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/ets_sys.h" #include "esp32c2/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/ets_sys.h" #include "esp32c3/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/ets_sys.h" +#include "esp32c5/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/ets_sys.h" #include "esp32c6/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/ets_sys.h" +#include "esp32c61/rom/gpio.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/ets_sys.h" #include "esp32h2/rom/gpio.h" @@ -63,9 +61,14 @@ #include "esp32p4/rom/ets_sys.h" #include "esp32p4/rom/gpio.h" #include "hal/spi_ll.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/ets_sys.h" -#include "esp32c5/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "soc/dport_reg.h" +#include "esp32s2/rom/ets_sys.h" +#include "esp32s2/rom/gpio.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "soc/dport_reg.h" +#include "esp32s3/rom/ets_sys.h" +#include "esp32s3/rom/gpio.h" #else #error Target CONFIG_IDF_TARGET is not supported #endif @@ -125,18 +128,7 @@ struct spi_struct_t { #define SPI_SS_IDX(p, n) ((p == 0) ? SPI_FSPI_SS_IDX(n) : ((p == 1) ? SPI_HSPI_SS_IDX(n) : 0)) -#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 -// ESP32C3 -#define SPI_COUNT (1) - -#define SPI_CLK_IDX(p) FSPICLK_OUT_IDX -#define SPI_MISO_IDX(p) FSPIQ_OUT_IDX -#define SPI_MOSI_IDX(p) FSPID_IN_IDX - -#define SPI_SPI_SS_IDX(n) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : ((n == 2) ? FSPICS2_OUT_IDX : FSPICS0_OUT_IDX))) -#define SPI_SS_IDX(p, n) SPI_SPI_SS_IDX(n) - -#else +#elif CONFIG_IDF_TARGET_ESP32 // ESP32 #define SPI_COUNT (4) @@ -149,6 +141,17 @@ struct spi_struct_t { #define SPI_VSPI_SS_IDX(n) ((n == 0) ? VSPICS0_OUT_IDX : ((n == 1) ? VSPICS1_OUT_IDX : ((n == 2) ? VSPICS2_OUT_IDX : VSPICS0_OUT_IDX))) #define SPI_SS_IDX(p, n) ((p == 0) ? SPI_SPI_SS_IDX(n) : ((p == 1) ? SPI_SPI_SS_IDX(n) : ((p == 2) ? SPI_HSPI_SS_IDX(n) : ((p == 3) ? SPI_VSPI_SS_IDX(n) : 0)))) +#else +// ESP32C2, C3, C5, C6, C61, H2 +#define SPI_COUNT (1) + +#define SPI_CLK_IDX(p) FSPICLK_OUT_IDX +#define SPI_MISO_IDX(p) FSPIQ_OUT_IDX +#define SPI_MOSI_IDX(p) FSPID_IN_IDX + +#define SPI_SPI_SS_IDX(n) ((n == 0) ? FSPICS0_OUT_IDX : ((n == 1) ? FSPICS1_OUT_IDX : ((n == 2) ? FSPICS2_OUT_IDX : FSPICS0_OUT_IDX))) +#define SPI_SS_IDX(p, n) SPI_SPI_SS_IDX(n) + #endif #if CONFIG_DISABLE_HAL_LOCKS @@ -159,17 +162,21 @@ static spi_t _spi_bus_array[] = { #if CONFIG_IDF_TARGET_ESP32S2 ||CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 1, -1, -1, -1, -1, false} +/* #elif CONFIG_IDF_TARGET_ESP32C2 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1, false} #elif CONFIG_IDF_TARGET_ESP32C3 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1, false} #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 {(spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1, false} -#else +*/ +#elif CONFIG_IDF_TARGET_ESP32 {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), 0, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 1, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 2, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3, -1, -1, -1, -1, false} +#else // ESP32C2, C3, C5, C6, C61, H2 + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 0, -1, -1, -1, -1, false} #endif }; // clang-format on @@ -179,22 +186,29 @@ static spi_t _spi_bus_array[] = { } while (xSemaphoreTake(spi->lock, portMAX_DELAY) != pdPASS) #define SPI_MUTEX_UNLOCK() xSemaphoreGive(spi->lock) +// clang-format off static spi_t _spi_bus_array[] = { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4 - {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1, false} + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false}, + {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 1, -1, -1, -1, -1, false} +/* #elif CONFIG_IDF_TARGET_ESP32C2 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false} #elif CONFIG_IDF_TARGET_ESP32C3 {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false} #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 {(spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false} -#else +*/ +#elif CONFIG_IDF_TARGET_ESP32 {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 2, -1, -1, -1, -1, false}, {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 3, -1, -1, -1, -1, false} +#else // ESP32C2, C3, C5, C6, C61, H2 + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 0, -1, -1, -1, -1, false} #endif }; +// clang-format on #endif static bool spiDetachBus(void *bus) { @@ -701,7 +715,7 @@ spi_t *spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t spi->dev->clk_gate.clk_en = 1; spi->dev->clk_gate.mst_clk_sel = 1; spi->dev->clk_gate.mst_clk_active = 1; -#if defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) +#if defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) spi->dev->dma_conf.tx_seg_trans_clr_en = 1; spi->dev->dma_conf.rx_seg_trans_clr_en = 1; spi->dev->dma_conf.dma_seg_trans_en = 0; @@ -712,10 +726,10 @@ spi_t *spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t spi->dev->user.doutdin = 1; int i; for (i = 0; i < 16; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = 0x00000000; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = 0x00000000; +#else + spi->dev->data_buf[i].val = 0x00000000; #endif } SPI_MUTEX_UNLOCK(); @@ -760,10 +774,10 @@ void spiWrite(spi_t *spi, const uint32_t *data, uint8_t len) { spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif for (i = 0; i < len; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i]; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i]; +#else + spi->dev->data_buf[i].val = data[i]; #endif } #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) @@ -787,10 +801,10 @@ void spiTransfer(spi_t *spi, uint32_t *data, uint8_t len) { spi->dev->mosi_dlen.usr_mosi_dbitlen = (len * 32) - 1; spi->dev->miso_dlen.usr_miso_dbitlen = (len * 32) - 1; for (i = 0; i < len; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i]; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i]; +#else + spi->dev->data_buf[i].val = data[i]; #endif } #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) @@ -800,10 +814,10 @@ void spiTransfer(spi_t *spi, uint32_t *data, uint8_t len) { spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); for (i = 0; i < len; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data[i] = spi->dev->data_buf[i].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data[i] = spi->dev->data_buf[i]; +#else + data[i] = spi->dev->data_buf[i].val; #endif } SPI_MUTEX_UNLOCK(); @@ -818,10 +832,10 @@ void spiWriteByte(spi_t *spi, uint8_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) @@ -840,10 +854,10 @@ uint8_t spiTransferByte(spi_t *spi, uint8_t data) { SPI_MUTEX_LOCK(); spi->dev->mosi_dlen.usr_mosi_dbitlen = 7; spi->dev->miso_dlen.usr_miso_dbitlen = 7; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -851,10 +865,10 @@ uint8_t spiTransferByte(spi_t *spi, uint8_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val & 0xFF; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0] & 0xFF; +#else + data = spi->dev->data_buf[0].val & 0xFF; #endif SPI_MUTEX_UNLOCK(); return data; @@ -881,10 +895,10 @@ void spiWriteWord(spi_t *spi, uint16_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -905,10 +919,10 @@ uint16_t spiTransferWord(spi_t *spi, uint16_t data) { SPI_MUTEX_LOCK(); spi->dev->mosi_dlen.usr_mosi_dbitlen = 15; spi->dev->miso_dlen.usr_miso_dbitlen = 15; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -916,10 +930,10 @@ uint16_t spiTransferWord(spi_t *spi, uint16_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0]; +#else + data = spi->dev->data_buf[0].val; #endif SPI_MUTEX_UNLOCK(); if (!spi->dev->ctrl.rd_bit_order) { @@ -940,10 +954,10 @@ void spiWriteLong(spi_t *spi, uint32_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -964,10 +978,10 @@ uint32_t spiTransferLong(spi_t *spi, uint32_t data) { SPI_MUTEX_LOCK(); spi->dev->mosi_dlen.usr_mosi_dbitlen = 31; spi->dev->miso_dlen.usr_miso_dbitlen = 31; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -975,10 +989,10 @@ uint32_t spiTransferLong(spi_t *spi, uint32_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0]; +#else + data = spi->dev->data_buf[0].val; #endif SPI_MUTEX_UNLOCK(); if (!spi->dev->ctrl.rd_bit_order) { @@ -1014,10 +1028,10 @@ static void __spiTransferBytes(spi_t *spi, const uint8_t *data, uint8_t *out, ui spi->dev->miso_dlen.usr_miso_dbitlen = ((bytes * 8) - 1); for (i = 0; i < words; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = wordsBuf[i]; //copy buffer to spi fifo -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = wordsBuf[i]; //copy buffer to spi fifo +#else + spi->dev->data_buf[i].val = wordsBuf[i]; //copy buffer to spi fifo #endif } @@ -1031,10 +1045,10 @@ static void __spiTransferBytes(spi_t *spi, const uint8_t *data, uint8_t *out, ui if (out) { for (i = 0; i < words; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - wordsBuf[i] = spi->dev->data_buf[i].val; //copy spi fifo to buffer -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 wordsBuf[i] = spi->dev->data_buf[i]; //copy spi fifo to buffer +#else + wordsBuf[i] = spi->dev->data_buf[i].val; //copy spi fifo to buffer #endif } memcpy(out, bytesBuf, bytes); //copy buffer to output @@ -1172,10 +1186,10 @@ void ARDUINO_ISR_ATTR spiWriteByteNL(spi_t *spi, uint8_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1191,10 +1205,10 @@ uint8_t spiTransferByteNL(spi_t *spi, uint8_t data) { } spi->dev->mosi_dlen.usr_mosi_dbitlen = 7; spi->dev->miso_dlen.usr_miso_dbitlen = 7; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1202,10 +1216,10 @@ uint8_t spiTransferByteNL(spi_t *spi, uint8_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val & 0xFF; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0] & 0xFF; +#else + data = spi->dev->data_buf[0].val & 0xFF; #endif return data; } @@ -1221,10 +1235,10 @@ void ARDUINO_ISR_ATTR spiWriteShortNL(spi_t *spi, uint16_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1243,10 +1257,10 @@ uint16_t spiTransferShortNL(spi_t *spi, uint16_t data) { } spi->dev->mosi_dlen.usr_mosi_dbitlen = 15; spi->dev->miso_dlen.usr_miso_dbitlen = 15; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1254,10 +1268,10 @@ uint16_t spiTransferShortNL(spi_t *spi, uint16_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val & 0xFFFF; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0] & 0xFFFF; +#else + data = spi->dev->data_buf[0].val & 0xFFFF; #endif if (!spi->dev->ctrl.rd_bit_order) { MSB_16_SET(data, data); @@ -1276,10 +1290,10 @@ void ARDUINO_ISR_ATTR spiWriteLongNL(spi_t *spi, uint32_t data) { #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32 spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1298,10 +1312,10 @@ uint32_t spiTransferLongNL(spi_t *spi, uint32_t data) { } spi->dev->mosi_dlen.usr_mosi_dbitlen = 31; spi->dev->miso_dlen.usr_miso_dbitlen = 31; -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1309,10 +1323,10 @@ uint32_t spiTransferLongNL(spi_t *spi, uint32_t data) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0]; +#else + data = spi->dev->data_buf[0].val; #endif if (!spi->dev->ctrl.rd_bit_order) { MSB_32_SET(data, data); @@ -1340,10 +1354,10 @@ void spiWriteNL(spi_t *spi, const void *data_in, uint32_t len) { spi->dev->miso_dlen.usr_miso_dbitlen = 0; #endif for (size_t i = 0; i < c_longs; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i]; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i]; +#else + spi->dev->data_buf[i].val = data[i]; #endif } #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) @@ -1379,18 +1393,18 @@ void spiTransferBytesNL(spi_t *spi, const void *data_in, uint8_t *data_out, uint spi->dev->miso_dlen.usr_miso_dbitlen = (c_len * 8) - 1; if (data) { for (size_t i = 0; i < c_longs; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i]; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i]; +#else + spi->dev->data_buf[i].val = data[i]; #endif } } else { for (size_t i = 0; i < c_longs; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = 0xFFFFFFFF; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = 0xFFFFFFFF; +#else + spi->dev->data_buf[i].val = 0xFFFFFFFF; #endif } } @@ -1403,16 +1417,16 @@ void spiTransferBytesNL(spi_t *spi, const void *data_in, uint8_t *data_out, uint if (result) { if (c_len & 3) { for (size_t i = 0; i < (c_longs - 1); i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - result[i] = spi->dev->data_buf[i].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 result[i] = spi->dev->data_buf[i]; +#else + result[i] = spi->dev->data_buf[i].val; #endif } -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - uint32_t last_data = spi->dev->data_buf[c_longs - 1].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 uint32_t last_data = spi->dev->data_buf[c_longs - 1]; +#else + uint32_t last_data = spi->dev->data_buf[c_longs - 1].val; #endif uint8_t *last_out8 = (uint8_t *)&result[c_longs - 1]; uint8_t *last_data8 = (uint8_t *)&last_data; @@ -1421,10 +1435,10 @@ void spiTransferBytesNL(spi_t *spi, const void *data_in, uint8_t *data_out, uint } } else { for (size_t i = 0; i < c_longs; i++) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - result[i] = spi->dev->data_buf[i].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 result[i] = spi->dev->data_buf[i]; +#else + result[i] = spi->dev->data_buf[i].val; #endif } } @@ -1463,10 +1477,10 @@ void spiTransferBitsNL(spi_t *spi, uint32_t data, uint32_t *out, uint8_t bits) { spi->dev->mosi_dlen.usr_mosi_dbitlen = (bits - 1); spi->dev->miso_dlen.usr_miso_dbitlen = (bits - 1); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[0].val = data; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[0] = data; +#else + spi->dev->data_buf[0].val = data; #endif #if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S2) spi->dev->cmd.update = 1; @@ -1474,10 +1488,10 @@ void spiTransferBitsNL(spi_t *spi, uint32_t data, uint32_t *out, uint8_t bits) { #endif spi->dev->cmd.usr = 1; while (spi->dev->cmd.usr); -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - data = spi->dev->data_buf[0].val; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 data = spi->dev->data_buf[0]; +#else + data = spi->dev->data_buf[0].val; #endif if (out) { *out = data; @@ -1515,30 +1529,30 @@ void ARDUINO_ISR_ATTR spiWritePixelsNL(spi_t *spi, const void *data_in, uint32_t if (msb) { if (l_bytes && i == (c_longs - 1)) { if (l_bytes == 2) { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - MSB_16_SET(spi->dev->data_buf[i].val, data[i]); -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 MSB_16_SET(spi->dev->data_buf[i], data[i]); +#else + MSB_16_SET(spi->dev->data_buf[i].val, data[i]); #endif } else { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i] & 0xFF; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i] & 0xFF; +#else + spi->dev->data_buf[i].val = data[i] & 0xFF; #endif } } else { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - MSB_PIX_SET(spi->dev->data_buf[i].val, data[i]); -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 MSB_PIX_SET(spi->dev->data_buf[i], data[i]); +#else + MSB_PIX_SET(spi->dev->data_buf[i].val, data[i]); #endif } } else { -#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 - spi->dev->data_buf[i].val = data[i]; -#else +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 spi->dev->data_buf[i] = data[i]; +#else + spi->dev->data_buf[i].val = data[i]; #endif } } diff --git a/cores/esp32/esp32-hal-spi.h b/cores/esp32/esp32-hal-spi.h index 0284fea8829..b83d199c54d 100644 --- a/cores/esp32/esp32-hal-spi.h +++ b/cores/esp32/esp32-hal-spi.h @@ -32,7 +32,7 @@ extern "C" { #define HSPI 2 //SPI 2 bus normally mapped to pins 12 - 15, but can be matrixed to any pins #define VSPI 3 //SPI 3 bus normally attached to pins 5, 18, 19 and 23, but can be matrixed to any pins #else -#define FSPI 0 // ESP32C2, C3, C6, H2, S2, S3, P4 - SPI 2 bus +#define FSPI 0 // ESP32C2, C3, C5, C6, C61, H2, S2, S3, P4 - SPI 2 bus #define HSPI 1 // ESP32S2, S3, P4 - SPI 3 bus #endif diff --git a/cores/esp32/esp32-hal.h b/cores/esp32/esp32-hal.h index 84c73577d3e..1a5503ea3ab 100644 --- a/cores/esp32/esp32-hal.h +++ b/cores/esp32/esp32-hal.h @@ -63,7 +63,7 @@ extern "C" { #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 static const uint8_t BOOT_PIN = 0; -#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C61 +#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C61 static const uint8_t BOOT_PIN = 9; #elif CONFIG_IDF_TARGET_ESP32P4 static const uint8_t BOOT_PIN = 35; diff --git a/docs/en/lib_builder.rst b/docs/en/lib_builder.rst index a8126c18edc..6c0693420ad 100644 --- a/docs/en/lib_builder.rst +++ b/docs/en/lib_builder.rst @@ -153,7 +153,9 @@ This build command will build for the ESP32-S3 target. You can specify other tar * esp32 * esp32c2 * esp32c3 +* esp32c5 * esp32c6 +* esp32c61 * esp32h2 * esp32p4 * esp32s2 @@ -211,7 +213,8 @@ Pre-Configuring the UI The UI can be pre-configured using command line arguments. The following arguments are available: - ``-t, --target ``: Comma-separated list of targets to be compiled. - Choose from: *all*, *esp32*, *esp32s2*, *esp32s3*, *esp32c2*, *esp32c3*, *esp32c6*, *esp32h2*. Default: all except *esp32c2*; + Choose from: *all*, *esp32*, *esp32c2*, *esp32c3*, *esp32c5*, *esp32c6*, *esp32c61*, *esp32h2*, *esp32s2*, *esp32s3*. + Default: all except *esp32c2* and *esp32c61*; - ``--copy, --no-copy``: Enable/disable copying the compiled libraries to ``arduino-esp32``. Enabled by default; - ``-c, --arduino-path ``: Path to ``arduino-esp32`` directory. Default: OS dependent; - ``-A, --arduino-branch ``: Branch of the ``arduino-esp32`` repository to be used. Default: set by the build script; diff --git a/idf_component.yml b/idf_component.yml index 7a883f1658a..cfb750e82ca 100644 --- a/idf_component.yml +++ b/idf_component.yml @@ -7,6 +7,7 @@ targets: - esp32c3 - esp32c5 - esp32c6 + - esp32c61 - esp32h2 - esp32p4 - esp32s2 @@ -20,6 +21,7 @@ files: - "variants/esp32c3/**/*" - "variants/esp32c5/**/*" - "variants/esp32c6/**/*" + - "variants/esp32c61/**/*" - "variants/esp32h2/**/*" - "variants/esp32p4/**/*" - "variants/esp32s2/**/*" @@ -57,16 +59,16 @@ dependencies: version: "==1.6.4" # compatible with esp-zigbee-lib 1.6.7 require: public rules: - - if: "target not in [esp32c2, esp32p4]" + - if: "target not in [esp32c2, esp32c61, esp32p4]" espressif/esp-zigbee-lib: version: "==1.6.7" require: public rules: - - if: "target not in [esp32c2, esp32p4]" + - if: "target not in [esp32c2, esp32c61, esp32p4]" espressif/esp-dsp: version: "^1.3.4" rules: - - if: "target != esp32c2" + - if: "target not in [esp32c2, esp32c61]" # RainMaker Start (Fixed versions, because Matter supports only Insights 1.0.1) espressif/network_provisioning: version: "1.0.2" @@ -132,4 +134,4 @@ dependencies: examples: - path: ./idf_component_examples/hello_world - path: ./idf_component_examples/hw_cdc_hello_world - - path: ./idf_component_examples/esp_matter_light + - path: ./idf_component_examples/Arduino_ESP_Matter_over_OpenThread diff --git a/idf_component_examples/Arduino_ESP_Matter_over_OpenThread/ci.yml b/idf_component_examples/Arduino_ESP_Matter_over_OpenThread/ci.yml index 8fde8e9096c..b826c20507e 100644 --- a/idf_component_examples/Arduino_ESP_Matter_over_OpenThread/ci.yml +++ b/idf_component_examples/Arduino_ESP_Matter_over_OpenThread/ci.yml @@ -2,6 +2,7 @@ targets: esp32s2: false esp32s3: false esp32c2: false + esp32c61: false esp32p4: false requires: - CONFIG_OPENTHREAD_ENABLED=y diff --git a/libraries/ESP32/examples/ResetReason/ResetReason/ResetReason.ino b/libraries/ESP32/examples/ResetReason/ResetReason/ResetReason.ino index ca7e15bf479..a3c0403189a 100644 --- a/libraries/ESP32/examples/ResetReason/ResetReason/ResetReason.ino +++ b/libraries/ESP32/examples/ResetReason/ResetReason/ResetReason.ino @@ -14,22 +14,24 @@ #if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4 #include "esp32/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S2 -#include "esp32s2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C2 #include "esp32c2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32S3 -#include "esp32s3/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32C5 +#include "esp32c5/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rom/rtc.h" #elif CONFIG_IDF_TARGET_ESP32P4 #include "esp32p4/rom/rtc.h" -#elif CONFIG_IDF_TARGET_ESP32C5 -#include "esp32c5/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S2 +#include "esp32s2/rom/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/rom/rtc.h" #else #error Target CONFIG_IDF_TARGET is not supported #endif diff --git a/libraries/SPI/src/SPI.cpp b/libraries/SPI/src/SPI.cpp index 6229f887553..673301a8e15 100644 --- a/libraries/SPI/src/SPI.cpp +++ b/libraries/SPI/src/SPI.cpp @@ -79,22 +79,21 @@ bool SPIClass::begin(int8_t sck, int8_t miso, int8_t mosi, int8_t ss) { } if (sck == -1 && miso == -1 && mosi == -1 && ss == -1) { -#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 +#if CONFIG_IDF_TARGET_ESP32 + _sck = (_spi_num == VSPI) ? SCK : 14; + _miso = (_spi_num == VSPI) ? MISO : 12; + _mosi = (_spi_num == VSPI) ? MOSI : 13; + _ss = (_spi_num == VSPI) ? SS : 15; +#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 _sck = (_spi_num == FSPI) ? SCK : -1; _miso = (_spi_num == FSPI) ? MISO : -1; _mosi = (_spi_num == FSPI) ? MOSI : -1; _ss = (_spi_num == FSPI) ? SS : -1; -#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 \ - || CONFIG_IDF_TARGET_ESP32C5 +#else _sck = SCK; _miso = MISO; _mosi = MOSI; _ss = SS; -#else - _sck = (_spi_num == VSPI) ? SCK : 14; - _miso = (_spi_num == VSPI) ? MISO : 12; - _mosi = (_spi_num == VSPI) ? MOSI : 13; - _ss = (_spi_num == VSPI) ? SS : 15; #endif } else { _sck = sck; diff --git a/platform.txt b/platform.txt index ff0f7c92062..d39e6735f87 100644 --- a/platform.txt +++ b/platform.txt @@ -77,14 +77,15 @@ compiler.libraries.ldflags= # Target dependent definitions build.extra_flags.esp32=-DARDUINO_USB_CDC_ON_BOOT=0 -build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot} -build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot} build.extra_flags.esp32c2=-DARDUINO_USB_CDC_ON_BOOT=0 build.extra_flags.esp32c3=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} +build.extra_flags.esp32c5=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} build.extra_flags.esp32c6=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} +build.extra_flags.esp32c61=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} build.extra_flags.esp32h2=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} build.extra_flags.esp32p4=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot} -build.extra_flags.esp32c5=-DARDUINO_USB_MODE=1 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} +build.extra_flags.esp32s3=-DARDUINO_USB_MODE={build.usb_mode} -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot} +build.extra_flags.esp32s2=-DARDUINO_USB_MODE=0 -DARDUINO_USB_CDC_ON_BOOT={build.cdc_on_boot} -DARDUINO_USB_MSC_ON_BOOT={build.msc_on_boot} -DARDUINO_USB_DFU_ON_BOOT={build.dfu_on_boot} # This can be overriden in boards.txt build.zigbee_mode= diff --git a/variants/esp32c61/pins_arduino.h b/variants/esp32c61/pins_arduino.h new file mode 100644 index 00000000000..dd25d0e53e7 --- /dev/null +++ b/variants/esp32c61/pins_arduino.h @@ -0,0 +1,37 @@ +#ifndef Pins_Arduino_h +#define Pins_Arduino_h + +#include +#include "soc/soc_caps.h" + +#define PIN_RGB_LED 8 +// BUILTIN_LED can be used in new Arduino API digitalWrite() like in Blink.ino +static const uint8_t LED_BUILTIN = SOC_GPIO_PIN_COUNT + PIN_RGB_LED; +#define BUILTIN_LED LED_BUILTIN // backward compatibility +#define LED_BUILTIN LED_BUILTIN // allow testing #ifdef LED_BUILTIN +// RGB_BUILTIN and RGB_BRIGHTNESS can be used in new Arduino API rgbLedWrite() +#define RGB_BUILTIN LED_BUILTIN +#define RGB_BRIGHTNESS 64 + +static const uint8_t TX = 11; +static const uint8_t RX = 10; + +static const uint8_t SDA = 23; +static const uint8_t SCL = 22; + +static const uint8_t SS = 25; +static const uint8_t MOSI = 26; +static const uint8_t MISO = 27; +static const uint8_t SCK = 28; + +static const uint8_t A0 = 0; +static const uint8_t A1 = 1; +static const uint8_t A2 = 2; +static const uint8_t A3 = 3; + +// LP I2C Pins are fixed on ESP32-C61 +#define WIRE1_PIN_DEFINED +static const uint8_t SDA1 = 6; +static const uint8_t SCL1 = 7; + +#endif /* Pins_Arduino_h */