@@ -48,6 +48,9 @@ extern "C" {
4848#include " esp32s3/rom/spi_flash.h"
4949#include " soc/efuse_reg.h"
5050#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
51+ #elif CONFIG_IDF_TARGET_ESP32C2
52+ #include " esp32c2/rom/spi_flash.h"
53+ #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
5154#elif CONFIG_IDF_TARGET_ESP32C3
5255#include " esp32c3/rom/spi_flash.h"
5356#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
@@ -366,7 +369,7 @@ FlashMode_t EspClass::getFlashChipMode(void)
366369 #if CONFIG_IDF_TARGET_ESP32S2
367370 uint32_t spi_ctrl = REG_READ (PERIPHS_SPI_FLASH_CTRL);
368371 #else
369- #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
372+ #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
370373 uint32_t spi_ctrl = REG_READ (DR_REG_SPI0_BASE + 0x8 );
371374 #else
372375 uint32_t spi_ctrl = REG_READ (SPI_CTRL_REG (0 ));
@@ -391,38 +394,109 @@ FlashMode_t EspClass::getFlashChipMode(void)
391394
392395uint32_t EspClass::magicFlashChipSize (uint8_t byte)
393396{
397+ /*
398+ FLASH_SIZES = {
399+ "1MB": 0x00,
400+ "2MB": 0x10,
401+ "4MB": 0x20,
402+ "8MB": 0x30,
403+ "16MB": 0x40,
404+ "32MB": 0x50,
405+ "64MB": 0x60,
406+ "128MB": 0x70,
407+ }
408+ */
394409 switch (byte & 0x0F ) {
395- case 0x0 : // 8 MBit (1MB)
396- return (1_MB);
397- case 0x1 : // 16 MBit (2MB)
398- return (2_MB);
399- case 0x2 : // 32 MBit (4MB)
400- return (4_MB);
401- case 0x3 : // 64 MBit (8MB)
402- return (8_MB);
403- case 0x4 : // 128 MBit (16MB)
404- return (16_MB);
405- default : // fail?
410+ case 0x0 : return (1_MB); // 8 MBit (1MB)
411+ case 0x1 : return (2_MB); // 16 MBit (2MB)
412+ case 0x2 : return (4_MB); // 32 MBit (4MB)
413+ case 0x3 : return (8_MB); // 64 MBit (8MB)
414+ case 0x4 : return (16_MB); // 128 MBit (16MB)
415+ case 0x5 : return (32_MB); // 256 MBit (32MB)
416+ case 0x6 : return (64_MB); // 512 MBit (64MB)
417+ case 0x7 : return (128_MB); // 1 GBit (128MB)
418+ default : // fail?
406419 return 0 ;
407420 }
408421}
409422
410423uint32_t EspClass::magicFlashChipSpeed (uint8_t byte)
411424{
425+ #if CONFIG_IDF_TARGET_ESP32C2
426+ /*
427+ FLASH_FREQUENCY = {
428+ "60m": 0xF,
429+ "30m": 0x0,
430+ "20m": 0x1,
431+ "15m": 0x2,
432+ }
433+ */
434+ switch (byte & 0x0F ) {
435+ case 0xF : return (60_MHz);
436+ case 0x0 : return (30_MHz);
437+ case 0x1 : return (20_MHz);
438+ case 0x2 : return (15_MHz);
439+ default : // fail?
440+ return 0 ;
441+ }
442+
443+
444+ #elif CONFIG_IDF_TARGET_ESP32C6
445+ /*
446+ FLASH_FREQUENCY = {
447+ "80m": 0x0, # workaround for wrong mspi HS div value in ROM
448+ "40m": 0x0,
449+ "20m": 0x2,
450+ }
451+ */
452+ switch (byte & 0x0F ) {
453+ case 0x0 : return (80_MHz);
454+ case 0x2 : return (20_MHz);
455+ default : // fail?
456+ return 0 ;
457+ }
458+
459+ #elif CONFIG_IDF_TARGET_ESP32H2
460+
461+ /*
462+ FLASH_FREQUENCY = {
463+ "48m": 0xF,
464+ "24m": 0x0,
465+ "16m": 0x1,
466+ "12m": 0x2,
467+ }
468+ */
412469 switch (byte & 0x0F ) {
413- case 0x0 : // 40 MHz
414- return (40_MHz);
415- case 0x1 : // 26 MHz
416- return (26_MHz);
417- case 0x2 : // 20 MHz
418- return (20_MHz);
419- case 0xf : // 80 MHz
420- return (80_MHz);
421- default : // fail?
470+ case 0xF : return (48_MHz);
471+ case 0x0 : return (24_MHz);
472+ case 0x1 : return (16_MHz);
473+ case 0x2 : return (12_MHz);
474+ default : // fail?
422475 return 0 ;
423476 }
477+
478+
479+ #else
480+ /*
481+ FLASH_FREQUENCY = {
482+ "80m": 0xF,
483+ "40m": 0x0,
484+ "26m": 0x1,
485+ "20m": 0x2,
486+ }
487+ */
488+ switch (byte & 0x0F ) {
489+ case 0xF : return (80_MHz);
490+ case 0x0 : return (40_MHz);
491+ case 0x1 : return (26_MHz);
492+ case 0x2 : return (20_MHz);
493+ default : // fail?
494+ return 0 ;
495+ }
496+ #endif
424497}
425498
499+
426500FlashMode_t EspClass::magicFlashChipMode (uint8_t byte)
427501{
428502 FlashMode_t mode = (FlashMode_t) byte;
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