Improve code efficiency.

Author: dok-net

cores/esp8266/core_esp8266_waveform.cpp

@@ -84,8 +84,8 @@ namespace {
     uint32_t enabled = 0; // Is it actively running, updated in NMI so no access outside the NMI code
 
     // Enable lock-free by only allowing updates to waveform.states and waveform.enabled from IRQ service routine
-    int32_t toSet = -1;     // Message to the NMI handler to start/modify exactly one waveform
-    int32_t toDisable = -1; // Message to the NMI handler to disable exactly one pin from waveform generation
+    int32_t toSetBits = 0;     // Message to the NMI handler to start/modify exactly one waveform
+    int32_t toDisableBits = 0; // Message to the NMI handler to disable exactly one pin from waveform generation
 
     uint32_t(*timer1CB)() = nullptr;
 
@@ -187,7 +187,7 @@ int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys,
       }
     }
     std::atomic_thread_fence(std::memory_order_release);
-    waveform.toSet = pin;
+    waveform.toSetBits = 1UL << pin;
     std::atomic_thread_fence(std::memory_order_release);
     if (!waveform.timer1Running) {
       initTimer();
@@ -204,11 +204,11 @@ int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys,
     if (runTimeCcys) {
       wave.mode = WaveformMode::UPDATEEXPIRY;
       std::atomic_thread_fence(std::memory_order_release);
-      waveform.toSet = pin;
+      waveform.toSetBits = 1UL << pin;
     }
   }
   std::atomic_thread_fence(std::memory_order_acq_rel);
-  while (waveform.toSet >= 0) {
+  while (waveform.toSetBits) {
     delay(0); // Wait for waveform to update
     std::atomic_thread_fence(std::memory_order_acquire);
   }
@@ -226,13 +226,13 @@ int ICACHE_RAM_ATTR stopWaveform(uint8_t pin) {
   std::atomic_thread_fence(std::memory_order_acquire);
   const uint32_t pinBit = 1UL << pin;
   if (waveform.enabled & pinBit) {
-    waveform.toDisable = pin;
+    waveform.toDisableBits = 1UL << pin;
     std::atomic_thread_fence(std::memory_order_release);
     // Must not interfere if Timer is due shortly
     if (T1V > ((clockCyclesPerMicrosecond() == 160) ? (IRQLATENCYCCYS + DELTAIRQCCYS) >> 1 : IRQLATENCYCCYS + DELTAIRQCCYS)) {
       timer1_write((clockCyclesPerMicrosecond() == 160) ? microsecondsToClockCycles(1) >> 1 : microsecondsToClockCycles(1));
     }
-    while (waveform.toDisable >= 0) {
+    while (waveform.toDisableBits) {
       /* no-op */ // Can't delay() since stopWaveform may be called from an IRQ
       std::atomic_thread_fence(std::memory_order_acquire);
     }
@@ -262,23 +262,22 @@ static inline ICACHE_RAM_ATTR int32_t scaleCcys(int32_t ccys) {
 
 static ICACHE_RAM_ATTR void timer1Interrupt() {
   const uint32_t isrStartCcy = ESP.getCycleCount();
-  const uint32_t toSetMask = waveform.toSet >= 0 ? 1UL << waveform.toSet : 0;
-  const uint32_t toDisableMask = waveform.toDisable >= 0 ? 1UL << waveform.toDisable : 0;
-  if ((toSetMask && !(waveform.enabled & toSetMask)) || toDisableMask) {
+  if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) {
     // Handle enable/disable requests from main app.
-    waveform.enabled = (waveform.enabled & ~toDisableMask) | toSetMask; // Set the requested waveforms on/off
+    waveform.enabled = (waveform.enabled & ~waveform.toDisableBits) | waveform.toSetBits; // Set the requested waveforms on/off
     // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t)
     waveform.startPin = __builtin_ffs(waveform.enabled) - 1;
     // Find the last bit by subtracting off GCC's count-leading-zeros (no offset in this one)
     waveform.endPin = 32 - __builtin_clz(waveform.enabled);
-    waveform.toDisable = -1;
+    waveform.toDisableBits = 0;
   }
 
-  if (toSetMask) {
-    Waveform& wave = waveform.pins[waveform.toSet];
+  if (waveform.toSetBits) {
+    const int toSetPin = __builtin_ffs(waveform.toSetBits) - 1;
+    Waveform& wave = waveform.pins[toSetPin];
     switch (wave.mode) {
     case WaveformMode::INIT:
-      waveform.states &= ~toSetMask; // Clear the state of any just started
+      waveform.states &= ~waveform.toSetBits; // Clear the state of any just started
       if (wave.alignPhase >= 0 && waveform.enabled & (1UL << wave.alignPhase)) {
         wave.nextPeriodCcy = waveform.pins[wave.alignPhase].nextPeriodCcy + wave.nextPeriodCcy;
         if (static_cast<int32_t>(waveform.nextEventCcy - wave.nextPeriodCcy) > 0) {
@@ -302,7 +301,7 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
     default:
       break;
     }
-    waveform.toSet = -1;
+    waveform.toSetBits = 0;
   }
 
   // Exit the loop if the next event, if any, is sufficiently distant.