Policy support ported from split LLVM repo

Author: arunthomas

Makefile.isp

@@ -0,0 +1,60 @@
+.PHONY: all
+.PHONY: debug
+.PHONY: release
+.PHONY: install
+.PHONY: clean
+
+export ISP_PREFIX ?= $(HOME)/.local/isp/
+
+ifeq "$(shell isp-support/check_ninja_version)" "System ninja is new enough"
+	NINJA := ninja
+else
+	NINJA := $(HOME)/.local/bin/ninja
+endif
+
+BUILD_TYPE ?= debug
+
+COMMON_CMAKE_FLAGS += -G "Ninja"
+COMMON_CMAKE_FLAGS += -DLLVM_ENABLE_PROJECTS="clang"
+COMMON_CMAKE_FLAGS += -DCMAKE_MAKE_PROGRAM=$(NINJA)
+COMMON_CMAKE_FLAGS += -DCMAKE_INSTALL_PREFIX=$(ISP_PREFIX)
+COMMON_CMAKE_FLAGS += -DCMAKE_C_COMPILER=clang
+COMMON_CMAKE_FLAGS += -DCMAKE_CXX_COMPILER=clang++
+COMMON_CMAKE_FLAGS += -DLLVM_BINUTILS_INCDIR=/usr/include
+COMMON_CMAKE_FLAGS += -DBUILD_SHARED_LIBS=True
+COMMON_CMAKE_FLAGS += -DLLVM_OPTIMIZED_TABLEGEN=True
+COMMON_CMAKE_FLAGS += -DLLVM_BUILD_TESTS=True
+COMMON_CMAKE_FLAGS += -DDEFAULT_SYSROOT=$(ISP_PREFIX)riscv32-unknown-elf
+COMMON_CMAKE_FLAGS += -DLLVM_DEFAULT_TARGET_TRIPLE="riscv32-unknown-elf"
+COMMON_CMAKE_FLAGS += -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="RISCV"
+COMMON_CMAKE_FLAGS += -DLLVM_TARGETS_TO_BUILD=""
+
+DEBUG_CMAKE_FLAGS := -DCMAKE_BUILD_TYPE=Debug
+DEBUG_CMAKE_FLAGS += -DLLVM_ENABLE_ASSERTIONS=ON
+DEBUG_CMAKE_FLAGS += -DCMAKE_C_FLAGS=-fstandalone-debug
+DEBUG_CMAKE_FLAGS += -DCMAKE_CXX_FLAGS=-fstandalone-debug
+
+RELEASE_CMAKE_FLAGS := -DCMAKE_BUILD_TYPE=Release
+
+debug-build/build.ninja: CMAKE_FLAGS := $(COMMON_CMAKE_FLAGS) $(DEBUG_CMAKE_FLAGS)
+
+release-build/build.ninja: CMAKE_FLAGS := $(COMMON_CMAKE_FLAGS) $(RELEASE_CMAKE_FLAGS)
+
+all: $(BUILD_TYPE)
+
+$(BUILD_TYPE): $(BUILD_TYPE)-build/build.ninja
+	$(NINJA) -C $(BUILD_TYPE)-build
+
+$(BUILD_TYPE)-build/build.ninja:
+	$(RM) -r $(BUILD_TYPE)-build
+	mkdir -p $(BUILD_TYPE)-build
+	cd $(BUILD_TYPE)-build; cmake $(CMAKE_FLAGS) ../llvm
+
+install: $(BUILD_TYPE)-install
+
+debug-install release-install: %-install: $*
+	$(NINJA) -C $*-build install
+
+clean:
+	$(RM) -r debug-build
+	$(RM) -r release-build

isp-support/README

@@ -0,0 +1,26 @@
+Best results obtained by using the gold linker.  Your ld is likely a symlink, 
+point it at ld.gold
+
+Be sure to clone recursively
+
+To build the llvm riscv cross compiler first make sure that you have a riscv
+toolchain installed.  I worked with the instructions here for a clean riscv
+toolchain:
+
+https://github.com/lowRISC/riscv-llvm
+
+Then run the configure script.  I *strongly* recommend you let it install the
+same version of cmake and ninja that I was using (the latest release as of May
+22, 2018).  It will also ask you for the base path to the riscv toolchain.  This
+will enable the cross compiler to actually work, and is where the cross compiler
+will get installed.
+
+./configure.sh
+
+After that, you can build either the debug or release version.  I have been
+working with the debug version during development, and strongly recommend it.
+The release version is currently *untested* and *unsupported*.  
+
+cd debug-build
+ninja
+ninja install

isp-support/check_ninja_version

@@ -0,0 +1,12 @@
+#!/bin/bash
+
+version=`ninja --version`;
+check="1.8.2";
+winner=`echo -e "${version}\n${check}" | sort -nr | head -1`;
+if [[ "${winner}" = "${version}" ]]; then
+    echo "System ninja is new enough"
+    exit 0
+else
+    echo "System ninja is too old"
+    exit 1
+fi

isp-support/install-dependencies

@@ -0,0 +1,29 @@
+#!/bin/bash
+
+set -e
+
+apt-get update
+
+apt-get install -y \
+        binutils-dev \
+        build-essential \
+        clang \
+        cmake \
+        unzip \
+        wget  \
+        zlib1g-dev
+
+ninja_check() {
+    md5sum --quiet -c <<< "540b5a37ac9d822b07179ec1771855ae $HOME/.local/bin/ninja"
+}
+
+if [ -f $HOME/.local/bin/ninja ]; then
+    ninja_check
+else
+    wget https://github.com/ninja-build/ninja/releases/download/v1.8.2/ninja-linux.zip
+    unzip -o ninja-linux.zip
+    mkdir -p $HOME/.local/bin
+    mv ninja $HOME/.local/bin
+    rm ninja-linux.zip
+    ninja_check
+fi

llvm/include/llvm/CodeGen/AsmPrinter.h

@@ -410,6 +410,12 @@ class AsmPrinter : public MachineFunctionPass {
     llvm_unreachable("EmitInstruction not implemented");
   }
 
+  //SSITH Placeholder, only used by RISCV currently
+  virtual void EmitSSITHMetadataInst(MCSymbol *Sym, const MCSubtargetInfo &STI,
+                                     uint8_t tag){}
+  virtual void EmitSSITHMetadataFnRange(MCSymbol *begin, MCSymbol *end,
+      const MCSubtargetInfo &STI) {}
+
   /// Return the symbol for the specified constant pool entry.
   virtual MCSymbol *GetCPISymbol(unsigned CPID) const;
 

llvm/include/llvm/CodeGen/MachineInstr.h

@@ -102,9 +102,16 @@ class MachineInstr
                                         // no unsigned wrap.
     NoSWrap      = 1 << 12,             // Instruction supports binary operator
                                         // no signed wrap.
-    IsExact      = 1 << 13              // Instruction supports division is
-                                        // known to be exact.
+    IsExact      = 1 << 13,              // Instruction supports division is
+    //SSITH
+    FnProlog     = 1 << 14,             // Instruction is part of the compiler generated
+                                        // prolog
+    FnEpilog     = 1 << 15,             // Instruction is part of the compiler generated
+                                        // epilog
+    FPtrStore    = 1 << 16,             // Instruction writes a function pointer to memory
+    FPtrCreate   = 1 << 17              // Instruction creates a function pointer
   };
+  //SSITH NOTE: Flags is only 16 bits long, getting close to the max here
 
 private:
   const MCInstrDesc *MCID;              // Instruction descriptor.
@@ -116,7 +123,7 @@ class MachineInstr
   using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;
   OperandCapacity CapOperands;          // Capacity of the Operands array.
 
-  uint16_t Flags = 0;                   // Various bits of additional
+  uint32_t Flags = 0;                   // Various bits of additional
                                         // information about machine
                                         // instruction.
 
@@ -286,7 +293,7 @@ class MachineInstr
   }
 
   /// Return the MI flags bitvector.
-  uint16_t getFlags() const {
+  uint32_t getFlags() const {
     return Flags;
   }
 
@@ -297,7 +304,7 @@ class MachineInstr
 
   /// Set a MI flag.
   void setFlag(MIFlag Flag) {
-    Flags |= (uint16_t)Flag;
+    Flags |= (uint32_t)Flag;
   }
 
   void setFlags(unsigned flags) {
@@ -308,7 +315,7 @@ class MachineInstr
 
   /// clearFlag - Clear a MI flag.
   void clearFlag(MIFlag Flag) {
-    Flags &= ~((uint16_t)Flag);
+    Flags &= ~((uint32_t)Flag);
   }
 
   /// Return true if MI is in a bundle (but not the first MI in a bundle).
@@ -1551,7 +1558,7 @@ class MachineInstr
   /// Return the MIFlags which represent both MachineInstrs. This
   /// should be used when merging two MachineInstrs into one. This routine does
   /// not modify the MIFlags of this MachineInstr.
-  uint16_t mergeFlagsWith(const MachineInstr& Other) const;
+  uint32_t mergeFlagsWith(const MachineInstr& Other) const;
 
   static uint16_t copyFlagsFromInstruction(const Instruction &I);
 

llvm/include/llvm/CodeGen/SelectionDAGNodes.h

@@ -367,6 +367,8 @@ struct SDNodeFlags {
   bool AllowContract : 1;
   bool ApproximateFuncs : 1;
   bool AllowReassociation : 1;
+  bool FPtrCreate : 1;
+  bool FPtrStore : 1;
 
 public:
   /// Default constructor turns off all optimization flags.
@@ -375,7 +377,7 @@ struct SDNodeFlags {
         Exact(false), NoNaNs(false), NoInfs(false),
         NoSignedZeros(false), AllowReciprocal(false), VectorReduction(false),
         AllowContract(false), ApproximateFuncs(false),
-        AllowReassociation(false) {}
+        AllowReassociation(false), FPtrCreate(false), FPtrStore(false) {}
 
   /// Propagate the fast-math-flags from an IR FPMathOperator.
   void copyFMF(const FPMathOperator &FPMO) {
@@ -438,6 +440,14 @@ struct SDNodeFlags {
     setDefined();
     AllowReassociation = b;
   }
+  void setFPtrCreate(bool b) {
+    setDefined();
+    FPtrCreate = b;
+  }
+  void setFPtrStore(bool b) {
+    setDefined();
+    FPtrStore = b;
+  }
 
   // These are accessors for each flag.
   bool hasNoUnsignedWrap() const { return NoUnsignedWrap; }
@@ -451,6 +461,8 @@ struct SDNodeFlags {
   bool hasAllowContract() const { return AllowContract; }
   bool hasApproximateFuncs() const { return ApproximateFuncs; }
   bool hasAllowReassociation() const { return AllowReassociation; }
+  bool hasFPtrCreate() const { return FPtrCreate; }
+  bool hasFPtrStore() const { return FPtrStore; }
 
   bool isFast() const {
     return NoSignedZeros && AllowReciprocal && NoNaNs && NoInfs &&
@@ -473,6 +485,8 @@ struct SDNodeFlags {
     AllowContract &= Flags.AllowContract;
     ApproximateFuncs &= Flags.ApproximateFuncs;
     AllowReassociation &= Flags.AllowReassociation;
+    FPtrCreate &= Flags.FPtrCreate;
+    FPtrStore &= Flags.FPtrStore;
   }
 };
 

llvm/include/llvm/CodeGen/TargetInstrInfo.h

@@ -887,7 +887,8 @@ class TargetInstrInfo : public MCInstrInfo {
                                    MachineBasicBlock::iterator MI,
                                    unsigned SrcReg, bool isKill, int FrameIndex,
                                    const TargetRegisterClass *RC,
-                                   const TargetRegisterInfo *TRI) const {
+                                   const TargetRegisterInfo *TRI,
+                                   unsigned flags = 0) const {
     llvm_unreachable("Target didn't implement "
                      "TargetInstrInfo::storeRegToStackSlot!");
   }
@@ -899,7 +900,8 @@ class TargetInstrInfo : public MCInstrInfo {
                                     MachineBasicBlock::iterator MI,
                                     unsigned DestReg, int FrameIndex,
                                     const TargetRegisterClass *RC,
-                                    const TargetRegisterInfo *TRI) const {
+                                    const TargetRegisterInfo *TRI,
+                                    unsigned flags = 0) const {
     llvm_unreachable("Target didn't implement "
                      "TargetInstrInfo::loadRegFromStackSlot!");
   }

llvm/include/llvm/MC/MCELFStreamer.h

@@ -82,7 +82,15 @@ class MCELFStreamer : public MCObjectStreamer {
   bool isBundleLocked() const;
   void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &) override;
   void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &) override;
-
+  
+  //SSITH
+  void EmitSSITHMetadataHeader(const MCSubtargetInfo &STI) override;
+  void EmitSSITHMetadataEntry(SmallVector<MCFixup, 4> &Fixups,
+                              const MCSubtargetInfo &STI,
+                              uint8_t MD_type, uint8_t tag) override;
+  char *SSITHpopLastInstruction(int nbytes) override;
+  void SSITHpushInstruction(char *inst, int nbytes) override;
+  
   void fixSymbolsInTLSFixups(const MCExpr *expr);
   void finalizeCGProfileEntry(const MCSymbolRefExpr *&S);
   void finalizeCGProfile();

llvm/include/llvm/MC/MCStreamer.h

@@ -583,6 +583,14 @@ class MCStreamer {
                             uint64_t Size = 0, unsigned ByteAlignment = 0,
                             SMLoc Loc = SMLoc()) = 0;
 
+  /// SSITH metadata write - only defined by MCELFStreamer
+  virtual void EmitSSITHMetadataHeader(const MCSubtargetInfo &STI) {}
+  virtual void EmitSSITHMetadataEntry(SmallVector<MCFixup, 4> &Fixups,
+                                      const MCSubtargetInfo &STI,
+                                      uint8_t MD_type, uint8_t tag) {}
+  virtual char *SSITHpopLastInstruction(int nbytes) { return nullptr; }
+  virtual void SSITHpushInstruction(char *inst, int nbytes) {}
+  
   /// Emit a thread local bss (.tbss) symbol.
   ///
   /// \param Section - The thread local common section.