Revert 393daca "[ARM] Enable TypePromotion by default"

This caused "Too many bits for uint64_t" asserts when building Chromium. See
https://crbug.com/1031978#c2 for a reproducer. I'll follow up on the
llvm-commits thread with a creduced version.

> ARMCodeGenPrepare has already been generalized and renamed to
> TypePromotion. We've had it enabled and tested downstream for a
> while, so enable it by default.
>
> Differential Revision: https://reviews.llvm.org/D70998

Author: zmodem

llvm/lib/CodeGen/TypePromotion.cpp

@@ -45,7 +45,7 @@
 using namespace llvm;
 
 static cl::opt<bool>
-DisablePromotion("disable-type-promotion", cl::Hidden, cl::init(false),
+DisablePromotion("disable-type-promotion", cl::Hidden, cl::init(true),
                  cl::desc("Disable type promotion pass"));
 
 // The goal of this pass is to enable more efficient code generation for
@@ -899,34 +899,16 @@ bool TypePromotion::TryToPromote(Value *V, unsigned PromotedWidth) {
              for (auto *I : CurrentVisited)
                I->dump();
              );
-
-  // Check that promoting this at the IR level is most likely beneficial. It's
-  // more likely if we're operating over multiple blocks and handling wrapping
-  // instructions.
   unsigned ToPromote = 0;
-  unsigned NonFreeArgs = 0;
-  SmallPtrSet<BasicBlock*, 4> Blocks;
   for (auto *V : CurrentVisited) {
-    if (auto *I = dyn_cast<Instruction>(V))
-      Blocks.insert(I->getParent());
-
-    if (Sources.count(V)) {
-      if (auto *Arg = dyn_cast<Argument>(V)) {
-        if (!Arg->hasZExtAttr() && !Arg->hasSExtAttr())
-          ++NonFreeArgs;
-      }
+    if (Sources.count(V))
       continue;
-    }
-
     if (Sinks.count(cast<Instruction>(V)))
       continue;
-
     ++ToPromote;
   }
 
-  // DAG optimisations should be able to handle these cases better, especially
-  // for function arguments.
-  if (ToPromote < 2 || (Blocks.size() == 1 && (NonFreeArgs > SafeWrap.size())))
+  if (ToPromote < 2)
     return false;
 
   Promoter->Mutate(OrigTy, PromotedWidth, CurrentVisited, Sources, Sinks,

llvm/test/Transforms/TypePromotion/ARM/calls.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define i8 @call_with_imms(i8* %arg) {
 ; CHECK-LABEL: @call_with_imms(

llvm/test/Transforms/TypePromotion/ARM/casts.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define i16 @dsp_trunc(i32 %arg0, i32 %arg1, i16* %gep0, i16* %gep1) {
 ; CHECK-LABEL: @dsp_trunc(

llvm/test/Transforms/TypePromotion/ARM/clear-structures.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define i32 @clear_structures(i8* nocapture readonly %fmt, [1 x i32] %ap.coerce, i8* %out, void (i32, i8*)* nocapture %write) {
 ; CHECK-LABEL: @clear_structures(

llvm/test/Transforms/TypePromotion/ARM/icmps.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define i32 @test_ult_254_inc_imm(i8 zeroext %x) {
 ; CHECK-LABEL: @test_ult_254_inc_imm(

llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 ; Check that the arguments are extended but then nothing else is.
 ; This also ensures that the pass can handle loops.

llvm/test/Transforms/TypePromotion/ARM/pointers.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define void @phi_pointers(i16* %a, i16* %b, i8 zeroext %M, i8 zeroext %N) {
 ; CHECK-LABEL: @phi_pointers(

llvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define i8 @eq_sgt(i8* %x, i8 *%y, i8 zeroext %z) {
 ; CHECK-LABEL: @eq_sgt(

llvm/test/Transforms/TypePromotion/ARM/signed.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.
 define i16 @test_signed_load(i16* %ptr) {

llvm/test/Transforms/TypePromotion/ARM/switch.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=arm -type-promotion -verify -S %s -o - | FileCheck %s
+; RUN: opt -mtriple=arm -type-promotion -verify -disable-type-promotion=false -S %s -o - | FileCheck %s
 
 define void @truncate_source_phi_switch(i8* %memblock, i8* %store, i16 %arg) {
 ; CHECK-LABEL: @truncate_source_phi_switch(