@@ -213,7 +213,6 @@ template <endianness E> static uint32_t readShuffle(const uint8_t *loc) {
213213 return v;
214214}
215215
216- template <endianness E>
217216static void writeValue (uint8_t *loc, uint64_t v, uint8_t bitsSize,
218217 uint8_t shift) {
219218 uint32_t instr = read32 (loc);
@@ -230,7 +229,7 @@ static void writeShuffleValue(uint8_t *loc, uint64_t v, uint8_t bitsSize,
230229 if (E == support::little)
231230 std::swap (words[0 ], words[1 ]);
232231
233- writeValue<E> (loc, v, bitsSize, shift);
232+ writeValue (loc, v, bitsSize, shift);
234233
235234 if (E == support::little)
236235 std::swap (words[0 ], words[1 ]);
@@ -246,7 +245,6 @@ static void writeMicroRelocation16(uint8_t *loc, uint64_t v, uint8_t bitsSize,
246245}
247246
248247template <class ELFT > void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
249- const endianness e = ELFT::TargetEndianness;
250248 if (isMicroMips ()) {
251249 uint64_t gotPlt = in.gotPlt ->getVA ();
252250 uint64_t plt = in.plt ->getVA ();
@@ -302,16 +300,15 @@ template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
302300 write32 (buf + 28 , 0x2718fffe ); // subu $24, $24, 2
303301
304302 uint64_t gotPlt = in.gotPlt ->getVA ();
305- writeValue<e> (buf, gotPlt + 0x8000 , 16 , 16 );
306- writeValue<e> (buf + 4 , gotPlt, 16 , 0 );
307- writeValue<e> (buf + 8 , gotPlt, 16 , 0 );
303+ writeValue (buf, gotPlt + 0x8000 , 16 , 16 );
304+ writeValue (buf + 4 , gotPlt, 16 , 0 );
305+ writeValue (buf + 8 , gotPlt, 16 , 0 );
308306}
309307
310308template <class ELFT >
311309void MIPS<ELFT>::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
312310 uint64_t pltEntryAddr, int32_t index,
313311 unsigned relOff) const {
314- const endianness e = ELFT::TargetEndianness;
315312 if (isMicroMips ()) {
316313 // Overwrite trap instructions written by Writer::writeTrapInstr.
317314 memset (buf, 0 , pltEntrySize);
@@ -341,9 +338,9 @@ void MIPS<ELFT>::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
341338 write32 (buf + 4 , loadInst); // l[wd] $25, %lo(.got.plt entry)($15)
342339 write32 (buf + 8 , jrInst); // jr $25 / jr.hb $25
343340 write32 (buf + 12 , addInst); // [d]addiu $24, $15, %lo(.got.plt entry)
344- writeValue<e> (buf, gotPltEntryAddr + 0x8000 , 16 , 16 );
345- writeValue<e> (buf + 4 , gotPltEntryAddr, 16 , 0 );
346- writeValue<e> (buf + 12 , gotPltEntryAddr, 16 , 0 );
341+ writeValue (buf, gotPltEntryAddr + 0x8000 , 16 , 16 );
342+ writeValue (buf + 4 , gotPltEntryAddr, 16 , 0 );
343+ writeValue (buf + 12 , gotPltEntryAddr, 16 , 0 );
347344}
348345
349346template <class ELFT >
@@ -494,7 +491,7 @@ static uint64_t fixupCrossModeJump(uint8_t *loc, RelType type, uint64_t val) {
494491 case R_MIPS_26: {
495492 uint32_t inst = read32 (loc) >> 26 ;
496493 if (inst == 0x3 || inst == 0x1d ) { // JAL or JALX
497- writeValue<e> (loc, 0x1d << 26 , 32 , 0 );
494+ writeValue (loc, 0x1d << 26 , 32 , 0 );
498495 return val;
499496 }
500497 break ;
@@ -558,17 +555,17 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
558555 write64 (loc, val);
559556 break ;
560557 case R_MIPS_26:
561- writeValue<e> (loc, val, 26 , 2 );
558+ writeValue (loc, val, 26 , 2 );
562559 break ;
563560 case R_MIPS_GOT16:
564561 // The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
565562 // is updated addend (not a GOT index). In that case write high 16 bits
566563 // to store a correct addend value.
567564 if (config->relocatable ) {
568- writeValue<e> (loc, val + 0x8000 , 16 , 16 );
565+ writeValue (loc, val + 0x8000 , 16 , 16 );
569566 } else {
570567 checkInt (loc, val, 16 , type);
571- writeValue<e> (loc, val, 16 , 0 );
568+ writeValue (loc, val, 16 , 0 );
572569 }
573570 break ;
574571 case R_MICROMIPS_GOT16:
@@ -595,7 +592,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
595592 case R_MIPS_PCLO16:
596593 case R_MIPS_TLS_DTPREL_LO16:
597594 case R_MIPS_TLS_TPREL_LO16:
598- writeValue<e> (loc, val, 16 , 0 );
595+ writeValue (loc, val, 16 , 0 );
599596 break ;
600597 case R_MICROMIPS_GPREL16:
601598 case R_MICROMIPS_TLS_GD:
@@ -621,7 +618,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
621618 case R_MIPS_PCHI16:
622619 case R_MIPS_TLS_DTPREL_HI16:
623620 case R_MIPS_TLS_TPREL_HI16:
624- writeValue<e> (loc, val + 0x8000 , 16 , 16 );
621+ writeValue (loc, val + 0x8000 , 16 , 16 );
625622 break ;
626623 case R_MICROMIPS_CALL_HI16:
627624 case R_MICROMIPS_GOT_HI16:
@@ -631,10 +628,10 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
631628 writeShuffleValue<e>(loc, val + 0x8000 , 16 , 16 );
632629 break ;
633630 case R_MIPS_HIGHER:
634- writeValue<e> (loc, val + 0x80008000 , 16 , 32 );
631+ writeValue (loc, val + 0x80008000 , 16 , 32 );
635632 break ;
636633 case R_MIPS_HIGHEST:
637- writeValue<e> (loc, val + 0x800080008000 , 16 , 48 );
634+ writeValue (loc, val + 0x800080008000 , 16 , 48 );
638635 break ;
639636 case R_MIPS_JALR:
640637 val -= 4 ;
@@ -657,25 +654,25 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
657654 case R_MIPS_PC16:
658655 checkAlignment (loc, val, 4 , type);
659656 checkInt (loc, val, 18 , type);
660- writeValue<e> (loc, val, 16 , 2 );
657+ writeValue (loc, val, 16 , 2 );
661658 break ;
662659 case R_MIPS_PC19_S2:
663660 checkAlignment (loc, val, 4 , type);
664661 checkInt (loc, val, 21 , type);
665- writeValue<e> (loc, val, 19 , 2 );
662+ writeValue (loc, val, 19 , 2 );
666663 break ;
667664 case R_MIPS_PC21_S2:
668665 checkAlignment (loc, val, 4 , type);
669666 checkInt (loc, val, 23 , type);
670- writeValue<e> (loc, val, 21 , 2 );
667+ writeValue (loc, val, 21 , 2 );
671668 break ;
672669 case R_MIPS_PC26_S2:
673670 checkAlignment (loc, val, 4 , type);
674671 checkInt (loc, val, 28 , type);
675- writeValue<e> (loc, val, 26 , 2 );
672+ writeValue (loc, val, 26 , 2 );
676673 break ;
677674 case R_MIPS_PC32:
678- writeValue<e> (loc, val, 32 , 0 );
675+ writeValue (loc, val, 32 , 0 );
679676 break ;
680677 case R_MICROMIPS_26_S1:
681678 case R_MICROMIPS_PC26_S1:
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