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octeontx2-af: add mbox for CPT LF reset
JIRA: https://issues.redhat.com/browse/RHEL-31478 Upstream Status: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git commit b7e4152 Author: Srujana Challa <schalla@marvell.com> Date: Wed Jan 18 17:33:49 2023 +0530 octeontx2-af: add mbox for CPT LF reset On OcteonTX2 SoC, the admin function (AF) is the only one with all priviliges to configure HW and alloc resources, PFs and it's VFs have to request AF via mailbox for all their needs. This patch adds a new mailbox for CPT VFs to request for CPT LF reset. Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Štěpán Horáček <shoracek@redhat.com>
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drivers/net/ethernet/marvell/octeontx2/af/mbox.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -196,6 +196,7 @@ M(CPT_STATS, 0xA05, cpt_sts, cpt_sts_req, cpt_sts_rsp) \
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M(CPT_RXC_TIME_CFG, 0xA06, cpt_rxc_time_cfg, cpt_rxc_time_cfg_req, \
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msg_rsp) \
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M(CPT_CTX_CACHE_SYNC, 0xA07, cpt_ctx_cache_sync, msg_req, msg_rsp) \
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M(CPT_LF_RESET, 0xA08, cpt_lf_reset, cpt_lf_rst_req, msg_rsp) \
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/* SDP mbox IDs (range 0x1000 - 0x11FF) */ \
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M(SET_SDP_CHAN_INFO, 0x1000, set_sdp_chan_info, sdp_chan_info_msg, msg_rsp) \
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M(GET_SDP_CHAN_INFO, 0x1001, get_sdp_chan_info, msg_req, sdp_get_chan_info_msg) \
@@ -1699,6 +1700,13 @@ struct cpt_inst_lmtst_req {
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u64 rsvd;
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};
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/* Mailbox message format to request for CPT LF reset */
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struct cpt_lf_rst_req {
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struct mbox_msghdr hdr;
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u32 slot;
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u32 rsvd;
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};
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struct sdp_node_info {
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/* Node to which this PF belons to */
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u8 node_id;

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -801,6 +801,39 @@ int rvu_mbox_handler_cpt_ctx_cache_sync(struct rvu *rvu, struct msg_req *req,
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return rvu_cpt_ctx_flush(rvu, req->hdr.pcifunc);
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}
803803

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int rvu_mbox_handler_cpt_lf_reset(struct rvu *rvu, struct cpt_lf_rst_req *req,
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struct msg_rsp *rsp)
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{
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u16 pcifunc = req->hdr.pcifunc;
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struct rvu_block *block;
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int cptlf, blkaddr, ret;
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u16 actual_slot;
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u64 ctl, ctl2;
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blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc,
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req->slot, &actual_slot);
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if (blkaddr < 0)
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return CPT_AF_ERR_LF_INVALID;
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block = &rvu->hw->block[blkaddr];
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820+
cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot);
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if (cptlf < 0)
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return CPT_AF_ERR_LF_INVALID;
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ctl = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf));
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ctl2 = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf));
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826+
ret = rvu_lf_reset(rvu, block, cptlf);
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if (ret)
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dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n",
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block->addr, cptlf);
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rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl);
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rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), ctl2);
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return 0;
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}
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static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr)
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{
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struct cpt_rxc_time_cfg_req req;

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