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22 | 22 |
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23 | 23 | static inline u64 __vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg) |
24 | 24 | { |
25 | | - u64 val; |
26 | | - |
27 | | - if (unlikely(vcpu_has_nv(vcpu))) |
| 25 | + if (has_vhe()) |
28 | 26 | return vcpu_read_sys_reg(vcpu, reg); |
29 | | - else if (vcpu_get_flag(vcpu, SYSREGS_ON_CPU) && |
30 | | - __vcpu_read_sys_reg_from_cpu(reg, &val)) |
31 | | - return val; |
32 | 27 |
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33 | 28 | return __vcpu_sys_reg(vcpu, reg); |
34 | 29 | } |
35 | 30 |
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36 | 31 | static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) |
37 | 32 | { |
38 | | - if (unlikely(vcpu_has_nv(vcpu))) |
| 33 | + if (has_vhe()) |
39 | 34 | vcpu_write_sys_reg(vcpu, val, reg); |
40 | | - else if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU) || |
41 | | - !__vcpu_write_sys_reg_to_cpu(val, reg)) |
| 35 | + else |
42 | 36 | __vcpu_assign_sys_reg(vcpu, reg, val); |
43 | 37 | } |
44 | 38 |
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45 | 39 | static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long target_mode, |
46 | 40 | u64 val) |
47 | 41 | { |
48 | | - if (unlikely(vcpu_has_nv(vcpu))) { |
| 42 | + if (has_vhe()) { |
49 | 43 | if (target_mode == PSR_MODE_EL1h) |
50 | 44 | vcpu_write_sys_reg(vcpu, val, SPSR_EL1); |
51 | 45 | else |
52 | 46 | vcpu_write_sys_reg(vcpu, val, SPSR_EL2); |
53 | | - } else if (has_vhe()) { |
54 | | - write_sysreg_el1(val, SYS_SPSR); |
55 | 47 | } else { |
56 | 48 | __vcpu_assign_sys_reg(vcpu, SPSR_EL1, val); |
57 | 49 | } |
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