KVM: arm64: Expose new KVM cap for cacheable PFNMAP

JIRA: https://issues.redhat.com/browse/RHEL-73607

Upstream: https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git

Conflicts: include/uapi/linux/kvm.h: rhel-10 does not have CAP 242
           backported yet, so minor source diff.  Kept CAP 243 value
	   to keep uapi compatibility from this version to future versions
	   in RHEL-10.

commit f55ce5a
Author: Ankit Agrawal <ankita@nvidia.com>
Date:   Sat Jul 5 07:17:17 2025 +0000

    KVM: arm64: Expose new KVM cap for cacheable PFNMAP

    Introduce a new KVM capability to expose to the userspace whether
    cacheable mapping of PFNMAP is supported.

    The ability to safely do the cacheable mapping of PFNMAP is contingent
    on S2FWB and ARM64_HAS_CACHE_DIC. S2FWB allows KVM to avoid flushing
    the D cache, ARM64_HAS_CACHE_DIC allows KVM to avoid flushing the icache
    and turns icache_inval_pou() into a NOP. The cap would be false if
    those requirements are missing and is checked by making use of
    kvm_arch_supports_cacheable_pfnmap.

    This capability would allow userspace to discover the support.
    It could for instance be used by userspace to prevent live-migration
    across FWB and non-FWB hosts.

    CC: Catalin Marinas <catalin.marinas@arm.com>
    CC: Jason Gunthorpe <jgg@nvidia.com>
    CC: Oliver Upton <oliver.upton@linux.dev>
    CC: David Hildenbrand <david@redhat.com>
    Suggested-by: Marc Zyngier <maz@kernel.org>
    Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
    Tested-by: Donald Dutile <ddutile@redhat.com>
    Signed-off-by: Ankit Agrawal <ankita@nvidia.com>
    Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
    Link: https://lore.kernel.org/r/20250705071717.5062-7-ankita@nvidia.com
    Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

Signed-off-by: Donald Dutile <ddutile@redhat.com>

Author: ddutile

Documentation/virt/kvm/api.rst

@@ -8490,7 +8490,7 @@ ENOSYS for the others.
 When enabled, KVM will exit to userspace with KVM_EXIT_SYSTEM_EVENT of
 type KVM_SYSTEM_EVENT_SUSPEND to process the guest suspend request.
 
-7.37 KVM_CAP_ARM_WRITABLE_IMP_ID_REGS
+7.42 KVM_CAP_ARM_WRITABLE_IMP_ID_REGS
 -------------------------------------
 
 :Architectures: arm64
@@ -8508,6 +8508,17 @@ aforementioned registers before the first KVM_RUN. These registers are VM
 scoped, meaning that the same set of values are presented on all vCPUs in a
 given VM.
 
+7.43 KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED
+-------------------------------------------
+
+:Architectures: arm64
+:Target: VM
+:Parameters: None
+
+This capability indicate to the userspace whether a PFNMAP memory region
+can be safely mapped as cacheable. This relies on the presence of
+force write back (FWB) feature support on the hardware.
+
 8. Other capabilities.
 ======================
 

arch/arm64/kvm/arm.c

@@ -408,6 +408,13 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 	case KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES:
 		r = BIT(0);
 		break;
+	case KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED:
+		if (!kvm)
+			r = -EINVAL;
+		else
+			r = kvm_supports_cacheable_pfnmap();
+		break;
+
 	default:
 		r = 0;
 	}

include/uapi/linux/kvm.h

@@ -932,6 +932,7 @@ struct kvm_enable_cap {
 #define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
 #define KVM_CAP_ARM_EL2 240
 #define KVM_CAP_ARM_EL2_E2H0 241
+#define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243
 
 struct kvm_irq_routing_irqchip {
 	__u32 irqchip;