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Bharat Bhushangregkh
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crypto: octeontx2 - Fix address alignment issue on ucode loading
commit b7b88b4 upstream. octeontx2 crypto driver allocates memory using kmalloc/kzalloc, and uses this memory for dma (does dma_map_single()). It assumes that kmalloc/kzalloc will return 128-byte aligned address. But kmalloc/kzalloc returns 8-byte aligned address after below changes: "9382bc44b5f5 arm64: allow kmalloc() caches aligned to the smaller cache_line_size()" Completion address should be 32-Byte alignment when loading microcode. Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> Cc: <stable@vger.kernel.org> # v6.5+ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c

Lines changed: 21 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1490,12 +1490,13 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
14901490
union otx2_cpt_opcode opcode;
14911491
union otx2_cpt_res_s *result;
14921492
union otx2_cpt_inst_s inst;
1493+
dma_addr_t result_baddr;
14931494
dma_addr_t rptr_baddr;
14941495
struct pci_dev *pdev;
1495-
u32 len, compl_rlen;
14961496
int timeout = 10000;
1497+
void *base, *rptr;
14971498
int ret, etype;
1498-
void *rptr;
1499+
u32 len;
14991500

15001501
/*
15011502
* We don't get capabilities if it was already done
@@ -1520,22 +1521,28 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
15201521
if (ret)
15211522
goto delete_grps;
15221523

1523-
compl_rlen = ALIGN(sizeof(union otx2_cpt_res_s), OTX2_CPT_DMA_MINALIGN);
1524-
len = compl_rlen + LOADFVC_RLEN;
1524+
/* Allocate extra memory for "rptr" and "result" pointer alignment */
1525+
len = LOADFVC_RLEN + ARCH_DMA_MINALIGN +
1526+
sizeof(union otx2_cpt_res_s) + OTX2_CPT_RES_ADDR_ALIGN;
15251527

1526-
result = kzalloc(len, GFP_KERNEL);
1527-
if (!result) {
1528+
base = kzalloc(len, GFP_KERNEL);
1529+
if (!base) {
15281530
ret = -ENOMEM;
15291531
goto lf_cleanup;
15301532
}
1531-
rptr_baddr = dma_map_single(&pdev->dev, (void *)result, len,
1532-
DMA_BIDIRECTIONAL);
1533+
1534+
rptr = PTR_ALIGN(base, ARCH_DMA_MINALIGN);
1535+
rptr_baddr = dma_map_single(&pdev->dev, rptr, len, DMA_BIDIRECTIONAL);
15331536
if (dma_mapping_error(&pdev->dev, rptr_baddr)) {
15341537
dev_err(&pdev->dev, "DMA mapping failed\n");
15351538
ret = -EFAULT;
1536-
goto free_result;
1539+
goto free_rptr;
15371540
}
1538-
rptr = (u8 *)result + compl_rlen;
1541+
1542+
result = (union otx2_cpt_res_s *)PTR_ALIGN(rptr + LOADFVC_RLEN,
1543+
OTX2_CPT_RES_ADDR_ALIGN);
1544+
result_baddr = ALIGN(rptr_baddr + LOADFVC_RLEN,
1545+
OTX2_CPT_RES_ADDR_ALIGN);
15391546

15401547
/* Fill in the command */
15411548
opcode.s.major = LOADFVC_MAJOR_OP;
@@ -1547,14 +1554,14 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
15471554
/* 64-bit swap for microcode data reads, not needed for addresses */
15481555
cpu_to_be64s(&iq_cmd.cmd.u);
15491556
iq_cmd.dptr = 0;
1550-
iq_cmd.rptr = rptr_baddr + compl_rlen;
1557+
iq_cmd.rptr = rptr_baddr;
15511558
iq_cmd.cptr.u = 0;
15521559

15531560
for (etype = 1; etype < OTX2_CPT_MAX_ENG_TYPES; etype++) {
15541561
result->s.compcode = OTX2_CPT_COMPLETION_CODE_INIT;
15551562
iq_cmd.cptr.s.grp = otx2_cpt_get_eng_grp(&cptpf->eng_grps,
15561563
etype);
1557-
otx2_cpt_fill_inst(&inst, &iq_cmd, rptr_baddr);
1564+
otx2_cpt_fill_inst(&inst, &iq_cmd, result_baddr);
15581565
lfs->ops->send_cmd(&inst, 1, &cptpf->lfs.lf[0]);
15591566
timeout = 10000;
15601567

@@ -1577,8 +1584,8 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)
15771584

15781585
error_no_response:
15791586
dma_unmap_single(&pdev->dev, rptr_baddr, len, DMA_BIDIRECTIONAL);
1580-
free_result:
1581-
kfree(result);
1587+
free_rptr:
1588+
kfree(base);
15821589
lf_cleanup:
15831590
otx2_cptlf_shutdown(lfs);
15841591
delete_grps:

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