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arm64: dts: s32g: add I2C[0..2] support for s32g2 and s32g3
JIRA: https://issues.redhat.com/browse/RHEL-116642 commit b2194a4 Author: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Date: Mon Jan 13 13:05:10 2025 +0200 arm64: dts: s32g: add I2C[0..2] support for s32g2 and s32g3 Add I2C[0..2] for S32G2 and S32G3 SoCs. Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Matthias Brugger <mbrugger@suse.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Jared Kangas <jkangas@redhat.com>
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arch/arm64/boot/dts/freescale/s32g2.dtsi

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@@ -333,6 +333,39 @@
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status = "disabled";
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};
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i2c0: i2c@401e4000 {
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compatible = "nxp,s32g2-i2c";
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reg = <0x401e4000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c1: i2c@401e8000 {
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compatible = "nxp,s32g2-i2c";
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reg = <0x401e8000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c2: i2c@401ec000 {
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compatible = "nxp,s32g2-i2c";
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reg = <0x401ec000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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uart2: serial@402bc000 {
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compatible = "nxp,s32g2-linflexuart",
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"fsl,s32v234-linflexuart";
@@ -341,6 +374,28 @@
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status = "disabled";
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};
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i2c3: i2c@402d8000 {
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compatible = "nxp,s32g2-i2c";
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reg = <0x402d8000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c4: i2c@402dc000 {
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compatible = "nxp,s32g2-i2c";
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reg = <0x402dc000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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usdhc0: mmc@402f0000 {
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compatible = "nxp,s32g2-usdhc";
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reg = <0x402f0000 0x1000>;

arch/arm64/boot/dts/freescale/s32g3.dtsi

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Original file line numberDiff line numberDiff line change
@@ -390,6 +390,42 @@
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status = "disabled";
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};
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i2c0: i2c@401e4000 {
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compatible = "nxp,s32g3-i2c",
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"nxp,s32g2-i2c";
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reg = <0x401e4000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c1: i2c@401e8000 {
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compatible = "nxp,s32g3-i2c",
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"nxp,s32g2-i2c";
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reg = <0x401e8000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c2: i2c@401ec000 {
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compatible = "nxp,s32g3-i2c",
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"nxp,s32g2-i2c";
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reg = <0x401ec000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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uart2: serial@402bc000 {
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compatible = "nxp,s32g3-linflexuart",
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"fsl,s32v234-linflexuart";
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status = "disabled";
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};
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i2c3: i2c@402d8000 {
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compatible = "nxp,s32g3-i2c",
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"nxp,s32g2-i2c";
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reg = <0x402d8000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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i2c4: i2c@402dc000 {
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compatible = "nxp,s32g3-i2c",
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"nxp,s32g2-i2c";
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reg = <0x402dc000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 40>;
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clock-names = "ipg";
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status = "disabled";
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};
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usdhc0: mmc@402f0000 {
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compatible = "nxp,s32g3-usdhc",
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"nxp,s32g2-usdhc";

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