@@ -684,18 +684,17 @@ enum rx_msdu_start_reception_type {
684684
685685#define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0)
686686#define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1)
687+ #define RX_MSDU_END_INFO5_TO_DS BIT(2)
688+ #define RX_MSDU_END_INFO5_TID GENMASK(6, 3)
687689#define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7)
688690#define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8)
689691#define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9)
690692#define RX_MSDU_END_INFO5_L3_HDR_PADDING GENMASK(11, 10)
691693#define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12)
692694#define RX_MSDU_END_INFO5_LAST_MSDU BIT(13)
695+ #define RX_MSDU_END_INFO5_FROM_DS BIT(14)
693696#define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15)
694697
695- #define RX_MSDU_END_QCN9274_INFO5_TO_DS BIT(2)
696- #define RX_MSDU_END_QCN9274_INFO5_TID GENMASK(6, 3)
697- #define RX_MSDU_END_QCN9274_INFO5_FROM_DS BIT(14)
698-
699698#define RX_MSDU_END_INFO6_MSDU_DROP BIT(0)
700699#define RX_MSDU_END_INFO6_REO_DEST_IND GENMASK(5, 1)
701700#define RX_MSDU_END_INFO6_FLOW_IDX GENMASK(25, 6)
@@ -709,14 +708,14 @@ enum rx_msdu_start_reception_type {
709708#define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8)
710709#define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9)
711710
712- #define RX_MSDU_END_QCN9274_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
713- #define RX_MSDU_END_QCN9274_INFO7_MSDU_LIMIT_ERROR BIT(11)
714- #define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_TIMEOUT BIT(12)
715- #define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_INVALID BIT(13)
716- #define RX_MSDU_END_QCN9274_INFO7_CCE_MATCH BIT(14)
717- #define RX_MSDU_END_QCN9274_INFO7_AMSDU_PARSER_ERR BIT(15)
711+ #define RX_MSDU_END_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
712+ #define RX_MSDU_END_INFO7_MSDU_LIMIT_ERROR BIT(11)
713+ #define RX_MSDU_END_INFO7_FLOW_IDX_TIMEOUT BIT(12)
714+ #define RX_MSDU_END_INFO7_FLOW_IDX_INVALID BIT(13)
715+ #define RX_MSDU_END_INFO7_CCE_MATCH BIT(14)
716+ #define RX_MSDU_END_INFO7_AMSDU_PARSER_ERR BIT(15)
718717
719- #define RX_MSDU_END_QCN9274_INFO8_KEY_ID GENMASK(7, 0)
718+ #define RX_MSDU_END_INFO8_KEY_ID GENMASK(7, 0)
720719
721720#define RX_MSDU_END_INFO9_SERVICE_CODE GENMASK(14, 6)
722721#define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15)
@@ -758,8 +757,8 @@ enum rx_msdu_start_reception_type {
758757#define RX_MSDU_END_INFO12_RECV_BW GENMASK(20, 18)
759758#define RX_MSDU_END_INFO12_RECEPTION_TYPE GENMASK(23, 21)
760759
761- #define RX_MSDU_END_QCN9274_INFO12_MIMO_SS_BITMAP GENMASK(30, 24)
762- #define RX_MSDU_END_QCN9274_INFO12_MIMO_DONE_COPY BIT(31)
760+ #define RX_MSDU_END_INFO12_MIMO_SS_BITMAP GENMASK(30, 24)
761+ #define RX_MSDU_END_INFO12_MIMO_DONE_COPY BIT(31)
763762
764763#define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0)
765764#define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2)
@@ -791,7 +790,7 @@ enum rx_msdu_start_reception_type {
791790#define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30)
792791#define RX_MSDU_END_INFO13_FCS_ERR BIT(31)
793792
794- #define RX_MSDU_END_QCN9274_INFO13_WIFI_PARSER_ERR BIT(15)
793+ #define RX_MSDU_END_INFO13_WIFI_PARSER_ERR BIT(15)
795794
796795#define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE GENMASK(12, 10)
797796#define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13)
@@ -889,65 +888,6 @@ struct rx_msdu_end_qcn9274_compact {
889888 __le32 info14 ;
890889} __packed ;
891890
892- /* These macro definitions are only used for WCN7850 */
893- #define RX_MSDU_END_WCN7850_INFO2_KEY_ID BIT(7, 0)
894-
895- #define RX_MSDU_END_WCN7850_INFO5_MSDU_LIMIT_ERR BIT(2)
896- #define RX_MSDU_END_WCN7850_INFO5_IDX_TIMEOUT BIT(3)
897- #define RX_MSDU_END_WCN7850_INFO5_IDX_INVALID BIT(4)
898- #define RX_MSDU_END_WCN7850_INFO5_WIFI_PARSE_ERR BIT(5)
899- #define RX_MSDU_END_WCN7850_INFO5_AMSDU_PARSER_ERR BIT(6)
900- #define RX_MSDU_END_WCN7850_INFO5_TCPUDP_CSUM_FAIL_CPY BIT(14)
901-
902- #define RX_MSDU_END_WCN7850_INFO12_MIMO_SS_BITMAP GENMASK(31, 24)
903-
904- #define RX_MSDU_END_WCN7850_INFO13_FRAGMENT_FLAG BIT(13)
905- #define RX_MSDU_END_WCN7850_INFO13_CCE_MATCH BIT(15)
906-
907- struct rx_msdu_end_wcn7850 {
908- __le16 info0 ;
909- __le16 phy_ppdu_id ;
910- __le16 ip_hdr_cksum ;
911- __le16 info1 ;
912- __le16 info2 ;
913- __le16 cumulative_l3_checksum ;
914- __le32 rule_indication0 ;
915- __le32 rule_indication1 ;
916- __le16 info3 ;
917- __le16 l3_type ;
918- __le32 ipv6_options_crc ;
919- __le32 tcp_seq_num ;
920- __le32 tcp_ack_num ;
921- __le16 info4 ;
922- __le16 window_size ;
923- __le16 tcp_udp_chksum ;
924- __le16 info5 ;
925- __le16 sa_idx ;
926- __le16 da_idx_or_sw_peer_id ;
927- __le32 info6 ;
928- __le32 fse_metadata ;
929- __le16 cce_metadata ;
930- __le16 sa_sw_peer_id ;
931- __le16 info7 ;
932- __le16 rsvd0 ;
933- __le16 cumulative_l4_checksum ;
934- __le16 cumulative_ip_length ;
935- __le32 info9 ;
936- __le32 info10 ;
937- __le32 info11 ;
938- __le32 toeplitz_hash_2_or_4 ;
939- __le32 flow_id_toeplitz ;
940- __le32 info12 ;
941- __le32 ppdu_start_timestamp_31_0 ;
942- __le32 ppdu_start_timestamp_63_32 ;
943- __le32 phy_meta_data ;
944- __le16 vlan_ctag_ci ;
945- __le16 vlan_stag_ci ;
946- __le32 rsvd [3 ];
947- __le32 info13 ;
948- __le32 info14 ;
949- } __packed ;
950-
951891/* rx_msdu_end
952892 *
953893 * rxpcu_mpdu_filter_in_category
@@ -1578,7 +1518,7 @@ struct rx_pkt_hdr_tlv {
15781518
15791519struct hal_rx_desc_wcn7850 {
15801520 __le64 msdu_end_tag ;
1581- struct rx_msdu_end_wcn7850 msdu_end ;
1521+ struct rx_msdu_end_qcn9274 msdu_end ;
15821522 u8 rx_padding0 [RX_BE_PADDING0_BYTES ];
15831523 __le64 mpdu_start_tag ;
15841524 struct rx_mpdu_start_qcn9274 mpdu_start ;
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