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Commit 9436d9e

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John W. Linville
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cxl/edac: Add support for PERFORM_MAINTENANCE command
JIRA: https://issues.redhat.com/browse/RHEL-107284 commit 077ee5f Author: Shiju Jose <shiju.jose@huawei.com> Date: Wed May 21 13:47:43 2025 +0100 cxl/edac: Add support for PERFORM_MAINTENANCE command Add support for PERFORM_MAINTENANCE command. CXL spec 3.2 section 8.2.10.7.1 describes the Perform Maintenance command. This command requests the device to execute the maintenance operation specified by the maintenance operation class and the maintenance operation subclass. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Link: https://patch.msgid.link/20250521124749.817-6-shiju.jose@huawei.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: John W. Linville <linville@redhat.com>
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drivers/cxl/core/edac.c

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@@ -813,6 +813,55 @@ static int cxl_memdev_ecs_init(struct cxl_memdev *cxlmd,
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return 0;
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}
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/*
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* Perform Maintenance CXL 3.2 Spec 8.2.10.7.1
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*/
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/*
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* Perform Maintenance input payload
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* CXL rev 3.2 section 8.2.10.7.1 Table 8-117
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*/
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struct cxl_mbox_maintenance_hdr {
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u8 op_class;
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u8 op_subclass;
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} __packed;
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static int cxl_perform_maintenance(struct cxl_mailbox *cxl_mbox, u8 class,
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u8 subclass, void *data_in,
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size_t data_in_size)
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{
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struct cxl_memdev_maintenance_pi {
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struct cxl_mbox_maintenance_hdr hdr;
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u8 data[];
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} __packed;
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struct cxl_mbox_cmd mbox_cmd;
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size_t hdr_size;
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struct cxl_memdev_maintenance_pi *pi __free(kvfree) =
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kvzalloc(cxl_mbox->payload_size, GFP_KERNEL);
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if (!pi)
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return -ENOMEM;
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pi->hdr.op_class = class;
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pi->hdr.op_subclass = subclass;
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hdr_size = sizeof(pi->hdr);
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/*
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* Check minimum mbox payload size is available for
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* the maintenance data transfer.
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*/
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if (hdr_size + data_in_size > cxl_mbox->payload_size)
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return -ENOMEM;
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memcpy(pi->data, data_in, data_in_size);
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mbox_cmd = (struct cxl_mbox_cmd){
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.opcode = CXL_MBOX_OP_DO_MAINTENANCE,
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.size_in = hdr_size + data_in_size,
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.payload_in = pi,
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};
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return cxl_internal_send_cmd(cxl_mbox, &mbox_cmd);
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}
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int devm_cxl_memdev_edac_register(struct cxl_memdev *cxlmd)
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{
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struct edac_dev_feature ras_features[CXL_NR_EDAC_DEV_FEATURES];

drivers/cxl/cxlmem.h

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@@ -531,6 +531,7 @@ enum cxl_opcode {
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CXL_MBOX_OP_GET_SUPPORTED_FEATURES = 0x0500,
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CXL_MBOX_OP_GET_FEATURE = 0x0501,
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CXL_MBOX_OP_SET_FEATURE = 0x0502,
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CXL_MBOX_OP_DO_MAINTENANCE = 0x0600,
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CXL_MBOX_OP_IDENTIFY = 0x4000,
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CXL_MBOX_OP_GET_PARTITION_INFO = 0x4100,
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CXL_MBOX_OP_SET_PARTITION_INFO = 0x4101,

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