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Merge: [RHEL 9.7] Update Arm GIC code
MR: https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-9/-/merge_requests/5978 JIRA: https://issues.redhat.com/browse/RHEL-62922 Signed-off-by: Charles Mirabile <cmirabil@redhat.com> Approved-by: Eric Chanudet <echanude@redhat.com> Approved-by: Mark Langsdorf <mlangsdo@redhat.com> Approved-by: CKI KWF Bot <cki-ci-bot+kwf-gitlab-com@redhat.com> Merged-by: Augusto Caringi <acaringi@redhat.com>
2 parents db4a497 + 0129dfe commit 8fdca6c

31 files changed

+781
-497
lines changed

‎arch/arm64/include/asm/arch_gicv3.h‎

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -175,21 +175,6 @@ static inline bool gic_prio_masking_enabled(void)
175175

176176
static inline void gic_pmr_mask_irqs(void)
177177
{
178-
BUILD_BUG_ON(GICD_INT_DEF_PRI < (__GIC_PRIO_IRQOFF |
179-
GIC_PRIO_PSR_I_SET));
180-
BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON);
181-
/*
182-
* Need to make sure IRQON allows IRQs when SCR_EL3.FIQ is cleared
183-
* and non-secure PMR accesses are not subject to the shifts that
184-
* are applied to IRQ priorities
185-
*/
186-
BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON);
187-
/*
188-
* Same situation as above, but now we make sure that we can mask
189-
* regular interrupts.
190-
*/
191-
BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) < (__GIC_PRIO_IRQOFF_NS |
192-
GIC_PRIO_PSR_I_SET));
193178
gic_write_pmr(GIC_PRIO_IRQOFF);
194179
}
195180

‎arch/arm64/include/asm/ptrace.h‎

Lines changed: 6 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -21,35 +21,12 @@
2121
#define INIT_PSTATE_EL2 \
2222
(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h)
2323

24-
/*
25-
* PMR values used to mask/unmask interrupts.
26-
*
27-
* GIC priority masking works as follows: if an IRQ's priority is a higher value
28-
* than the value held in PMR, that IRQ is masked. Lowering the value of PMR
29-
* means masking more IRQs (or at least that the same IRQs remain masked).
30-
*
31-
* To mask interrupts, we clear the most significant bit of PMR.
32-
*
33-
* Some code sections either automatically switch back to PSR.I or explicitly
34-
* require to not use priority masking. If bit GIC_PRIO_PSR_I_SET is included
35-
* in the priority mask, it indicates that PSR.I should be set and
36-
* interrupt disabling temporarily does not rely on IRQ priorities.
37-
*/
38-
#define GIC_PRIO_IRQON 0xe0
39-
#define __GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)
40-
#define __GIC_PRIO_IRQOFF_NS 0xa0
41-
#define GIC_PRIO_PSR_I_SET (1 << 4)
42-
43-
#define GIC_PRIO_IRQOFF \
44-
({ \
45-
extern struct static_key_false gic_nonsecure_priorities;\
46-
u8 __prio = __GIC_PRIO_IRQOFF; \
47-
\
48-
if (static_branch_unlikely(&gic_nonsecure_priorities)) \
49-
__prio = __GIC_PRIO_IRQOFF_NS; \
50-
\
51-
__prio; \
52-
})
24+
#include <linux/irqchip/arm-gic-v3-prio.h>
25+
26+
#define GIC_PRIO_IRQON GICV3_PRIO_UNMASKED
27+
#define GIC_PRIO_IRQOFF GICV3_PRIO_IRQ
28+
29+
#define GIC_PRIO_PSR_I_SET GICV3_PRIO_PSR_I_SET
5330

5431
/* Additional SPSR bits not exposed in the UABI */
5532
#define PSR_MODE_THREAD_BIT (1 << 0)

‎arch/arm64/kernel/image-vars.h‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -103,11 +103,6 @@ KVM_NVHE_ALIAS(__hyp_stub_vectors);
103103
KVM_NVHE_ALIAS(vgic_v2_cpuif_trap);
104104
KVM_NVHE_ALIAS(vgic_v3_cpuif_trap);
105105

106-
#ifdef CONFIG_ARM64_PSEUDO_NMI
107-
/* Static key checked in GIC_PRIO_IRQOFF. */
108-
KVM_NVHE_ALIAS(gic_nonsecure_priorities);
109-
#endif
110-
111106
/* EL2 exception handling */
112107
KVM_NVHE_ALIAS(__start___kvm_ex_table);
113108
KVM_NVHE_ALIAS(__stop___kvm_ex_table);

‎arch/arm64/kernel/smp.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -532,7 +532,8 @@ acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
532532
{
533533
u64 hwid = processor->arm_mpidr;
534534

535-
if (!acpi_gicc_is_usable(processor)) {
535+
if (!(processor->flags &
536+
(ACPI_MADT_ENABLED | ACPI_MADT_GICC_ONLINE_CAPABLE))) {
536537
pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
537538
return;
538539
}

‎drivers/acpi/processor_core.c‎

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,8 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry,
9090
struct acpi_madt_generic_interrupt *gicc =
9191
container_of(entry, struct acpi_madt_generic_interrupt, header);
9292

93-
if (!acpi_gicc_is_usable(gicc))
93+
if (!(gicc->flags &
94+
(ACPI_MADT_ENABLED | ACPI_MADT_GICC_ONLINE_CAPABLE)))
9495
return -ENODEV;
9596

9697
/* device_declaration means Device object in DSDT, in the
@@ -159,6 +160,21 @@ phys_cpuid_t __init acpi_map_madt_entry(u32 acpi_id)
159160
return rv;
160161
}
161162

163+
int __init acpi_get_madt_revision(void)
164+
{
165+
struct acpi_table_header *madt = NULL;
166+
int revision;
167+
168+
if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_MADT, 0, &madt)))
169+
return -EINVAL;
170+
171+
revision = madt->revision;
172+
173+
acpi_put_table(madt);
174+
175+
return revision;
176+
}
177+
162178
static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id)
163179
{
164180
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };

‎drivers/irqchip/irq-atmel-aic.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,8 +57,7 @@
5757

5858
static struct irq_domain *aic_domain;
5959

60-
static asmlinkage void __exception_irq_entry
61-
aic_handle(struct pt_regs *regs)
60+
static void __exception_irq_entry aic_handle(struct pt_regs *regs)
6261
{
6362
struct irq_domain_chip_generic *dgc = aic_domain->gc;
6463
struct irq_chip_generic *gc = dgc->gc[0];

‎drivers/irqchip/irq-atmel-aic5.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,7 @@
6767

6868
static struct irq_domain *aic5_domain;
6969

70-
static asmlinkage void __exception_irq_entry
71-
aic5_handle(struct pt_regs *regs)
70+
static void __exception_irq_entry aic5_handle(struct pt_regs *regs)
7271
{
7372
struct irq_chip_generic *bgc = irq_get_domain_generic_chip(aic5_domain, 0);
7473
u32 irqnr;

‎drivers/irqchip/irq-clps711x.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ static struct {
6969
struct irq_domain_ops ops;
7070
} *clps711x_intc;
7171

72-
static asmlinkage void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
72+
static void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
7373
{
7474
u32 irqstat;
7575

‎drivers/irqchip/irq-davinci-cp-intc.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -116,8 +116,7 @@ static struct irq_chip davinci_cp_intc_irq_chip = {
116116
.flags = IRQCHIP_SKIP_SET_WAKE,
117117
};
118118

119-
static asmlinkage void __exception_irq_entry
120-
davinci_cp_intc_handle_irq(struct pt_regs *regs)
119+
static void __exception_irq_entry davinci_cp_intc_handle_irq(struct pt_regs *regs)
121120
{
122121
int gpir, irqnr, none;
123122

‎drivers/irqchip/irq-ftintc010.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,7 @@ static struct irq_chip ft010_irq_chip = {
126126
/* Local static for the IRQ entry call */
127127
static struct ft010_irq_data firq;
128128

129-
asmlinkage void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)
129+
static void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)
130130
{
131131
struct ft010_irq_data *f = &firq;
132132
int irq;

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