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Merge: Update intel_pstate to upstream 6.15
MR: https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-9/-/merge_requests/6657 JIRA: https://issues.redhat.com/browse/RHEL-85517 Omitted-Fix: e120829 - this will be brought in during perf update Signed-off-by: David Arcari <darcari@redhat.com> Approved-by: Steve Best <sbest@redhat.com> Approved-by: Tony Camuso <tcamuso@redhat.com> Approved-by: Lenny Szubowicz <lszubowi@redhat.com> Approved-by: CKI KWF Bot <cki-ci-bot+kwf-gitlab-com@redhat.com> Merged-by: Augusto Caringi <acaringi@redhat.com>
2 parents ee316c0 + 6e03708 commit 7ac9661

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‎Documentation/admin-guide/kernel-parameters.txt‎

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@@ -2198,6 +2198,9 @@
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per_cpu_perf_limits
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Allow per-logical-CPU P-State performance control limits using
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cpufreq sysfs interface
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no_cas
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Do not enable capacity-aware scheduling (CAS) on
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hybrid systems
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intremap= [X86-64, Intel-IOMMU]
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on enable Interrupt Remapping (default)

‎Documentation/admin-guide/pm/intel_pstate.rst‎

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@@ -696,6 +696,9 @@ of them have to be prepended with the ``intel_pstate=`` prefix.
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Use per-logical-CPU P-State limits (see `Coordination of P-state
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Limits`_ for details).
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``no_cas``
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Do not enable capacity-aware scheduling (CAS) which is enabled by
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default on hybrid systems.
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Diagnostics and Tuning
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======================

‎arch/x86/include/asm/cpufeatures.h‎

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@@ -480,6 +480,7 @@
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#define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control enabled */
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#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
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#define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */
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#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
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/*
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* BUG word(s)

‎arch/x86/include/asm/intel-family.h‎

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@@ -263,4 +263,10 @@
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/* Family 19 */
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#define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond Rapids */
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266+
/* CPU core types */
267+
enum intel_cpu_type {
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INTEL_CPU_TYPE_ATOM = 0x20,
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INTEL_CPU_TYPE_CORE = 0x40,
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};
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#endif /* _ASM_X86_INTEL_FAMILY_H */

‎arch/x86/include/asm/processor.h‎

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@@ -111,6 +111,24 @@ struct cpuinfo_topology {
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// Cache level topology IDs
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u32 llc_id;
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u32 l2c_id;
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// Hardware defined CPU-type
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union {
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u32 cpu_type;
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struct {
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// CPUID.1A.EAX[23-0]
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u32 intel_native_model_id :24;
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// CPUID.1A.EAX[31-24]
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u32 intel_type :8;
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};
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struct {
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// CPUID 0x80000026.EBX
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u32 amd_num_processors :16,
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amd_power_eff_ranking :8,
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amd_native_model_id :4,
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amd_type :4;
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};
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};
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};
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struct cpuinfo_x86 {

‎arch/x86/include/asm/topology.h‎

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@@ -114,6 +114,12 @@ enum x86_topology_domains {
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TOPO_MAX_DOMAIN,
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};
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enum x86_topology_cpu_type {
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TOPO_CPU_TYPE_PERFORMANCE,
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TOPO_CPU_TYPE_EFFICIENCY,
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TOPO_CPU_TYPE_UNKNOWN,
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};
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struct x86_topology_system {
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unsigned int dom_shifts[TOPO_MAX_DOMAIN];
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unsigned int dom_size[TOPO_MAX_DOMAIN];
@@ -144,6 +150,9 @@ extern unsigned int __max_threads_per_core;
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extern unsigned int __num_threads_per_package;
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extern unsigned int __num_cores_per_package;
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const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c);
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enum x86_topology_cpu_type get_topology_cpu_type(struct cpuinfo_x86 *c);
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static inline unsigned int topology_max_packages(void)
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{
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return __max_logical_packages;

‎arch/x86/kernel/cpu/debugfs.c‎

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@@ -22,6 +22,7 @@ static int cpu_debug_show(struct seq_file *m, void *p)
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seq_printf(m, "die_id: %u\n", c->topo.die_id);
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seq_printf(m, "cu_id: %u\n", c->topo.cu_id);
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seq_printf(m, "core_id: %u\n", c->topo.core_id);
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seq_printf(m, "cpu_type: %s\n", get_topology_cpu_type_name(c));
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seq_printf(m, "logical_pkg_id: %u\n", c->topo.logical_pkg_id);
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seq_printf(m, "logical_die_id: %u\n", c->topo.logical_die_id);
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seq_printf(m, "llc_id: %u\n", c->topo.llc_id);

‎arch/x86/kernel/cpu/scattered.c‎

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@@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
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{ X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 },
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{ X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 },
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{ X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 },
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{ X86_FEATURE_AMD_HETEROGENEOUS_CORES, CPUID_EAX, 30, 0x80000026, 0 },
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{ 0, 0, 0, 0, 0 }
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};
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‎arch/x86/kernel/cpu/topology_amd.c‎

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@@ -182,6 +182,9 @@ static void parse_topology_amd(struct topo_scan *tscan)
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if (cpu_feature_enabled(X86_FEATURE_TOPOEXT))
183183
has_topoext = cpu_parse_topology_ext(tscan);
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185+
if (cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))
186+
tscan->c->topo.cpu_type = cpuid_ebx(0x80000026);
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185188
if (!has_topoext && !parse_8000_0008(tscan))
186189
return;
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‎arch/x86/kernel/cpu/topology_common.c‎

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@@ -3,6 +3,7 @@
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#include <xen/xen.h>
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#include <asm/intel-family.h>
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#include <asm/apic.h>
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#include <asm/processor.h>
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#include <asm/smp.h>
@@ -27,6 +28,36 @@ void topology_set_dom(struct topo_scan *tscan, enum x86_topology_domains dom,
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}
2829
}
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enum x86_topology_cpu_type get_topology_cpu_type(struct cpuinfo_x86 *c)
32+
{
33+
if (c->x86_vendor == X86_VENDOR_INTEL) {
34+
switch (c->topo.intel_type) {
35+
case INTEL_CPU_TYPE_ATOM: return TOPO_CPU_TYPE_EFFICIENCY;
36+
case INTEL_CPU_TYPE_CORE: return TOPO_CPU_TYPE_PERFORMANCE;
37+
}
38+
}
39+
if (c->x86_vendor == X86_VENDOR_AMD) {
40+
switch (c->topo.amd_type) {
41+
case 0: return TOPO_CPU_TYPE_PERFORMANCE;
42+
case 1: return TOPO_CPU_TYPE_EFFICIENCY;
43+
}
44+
}
45+
46+
return TOPO_CPU_TYPE_UNKNOWN;
47+
}
48+
49+
const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c)
50+
{
51+
switch (get_topology_cpu_type(c)) {
52+
case TOPO_CPU_TYPE_PERFORMANCE:
53+
return "performance";
54+
case TOPO_CPU_TYPE_EFFICIENCY:
55+
return "efficiency";
56+
default:
57+
return "unknown";
58+
}
59+
}
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static unsigned int __maybe_unused parse_num_cores_legacy(struct cpuinfo_x86 *c)
3162
{
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struct {
@@ -87,6 +118,7 @@ static void parse_topology(struct topo_scan *tscan, bool early)
87118
.cu_id = 0xff,
88119
.llc_id = BAD_APICID,
89120
.l2c_id = BAD_APICID,
121+
.cpu_type = TOPO_CPU_TYPE_UNKNOWN,
90122
};
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struct cpuinfo_x86 *c = tscan->c;
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struct {
@@ -132,6 +164,8 @@ static void parse_topology(struct topo_scan *tscan, bool early)
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case X86_VENDOR_INTEL:
133165
if (!IS_ENABLED(CONFIG_CPU_SUP_INTEL) || !cpu_parse_topology_ext(tscan))
134166
parse_legacy(tscan);
167+
if (c->cpuid_level >= 0x1a)
168+
c->topo.cpu_type = cpuid_eax(0x1a);
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break;
136170
case X86_VENDOR_HYGON:
137171
if (IS_ENABLED(CONFIG_CPU_SUP_HYGON))

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