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Commit 75aeb44

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Gavin Shan
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KVM: arm64: Initialize SCTLR_EL1 in __kvm_hyp_init_cpu()
JIRA: https://issues.redhat.com/browse/RHEL-82298 When KVM is in protected mode, host calls to PSCI are proxied via EL2, and cold entries from CPU_ON, CPU_SUSPEND, and SYSTEM_SUSPEND bounce through __kvm_hyp_init_cpu() at EL2 before entering the host kernel's entry point at EL1. While __kvm_hyp_init_cpu() initializes SPSR_EL2 for the exception return to EL1, it does not initialize SCTLR_EL1. Due to this, it's possible to enter EL1 with SCTLR_EL1 in an UNKNOWN state. In practice this has been seen to result in kernel crashes after CPU_ON as a result of SCTLR_EL1.M being 1 in violation of the initial core configuration specified by PSCI. Fix this by initializing SCTLR_EL1 for cold entry to the host kernel. As it's necessary to write to SCTLR_EL12 in VHE mode, this initialization is moved into __kvm_host_psci_cpu_entry() where we can use write_sysreg_el1(). The remnants of the '__init_el2_nvhe_prepare_eret' macro are folded into its only caller, as this is clearer than having the macro. Fixes: cdf3671 ("KVM: arm64: Intercept host's CPU_ON SMCs") Reported-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Ahmed Genidi <ahmed.genidi@arm.com> [ Mark: clarify commit message, handle E2H, move to C, remove macro ] Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Ahmed Genidi <ahmed.genidi@arm.com> Cc: Ben Horgan <ben.horgan@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Leo Yan <leo.yan@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oliver.upton@linux.dev> Cc: Will Deacon <will@kernel.org> Reviewed-by: Leo Yan <leo.yan@arm.com> Link: https://lore.kernel.org/r/20250227180526.1204723-3-mark.rutland@arm.com Signed-off-by: Marc Zyngier <maz@kernel.org> (cherry picked from commit 3855a7b) Signed-off-by: Gavin Shan <gshan@redhat.com> Conflicts: arch/arm64/include/asm/el2_setup.h Contextual conflicts due to missed upstream commits ff5181d ("arm64/gcs: Provide basic EL2 setup to allow GCS usage at EL0 and EL1") and 23b33d1 ("arm64: head.S: Initialise MPAM EL2 registers and disable traps")
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arch/arm64/include/asm/el2_setup.h

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@@ -230,11 +230,6 @@
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.Lskip_fgt_\@:
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.endm
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.macro __init_el2_nvhe_prepare_eret
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mov x0, #INIT_PSTATE_EL1
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msr spsr_el2, x0
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.endm
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/**
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* Initialize EL2 registers to sane values. This should be called early on all
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* cores that were booted in EL2. Note that everything gets initialised as

arch/arm64/kernel/head.S

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@@ -319,7 +319,8 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
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msr sctlr_el1, x1
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mov x2, xzr
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3:
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__init_el2_nvhe_prepare_eret
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mov x0, #INIT_PSTATE_EL1
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msr spsr_el2, x0
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mov w0, #BOOT_CPU_MODE_EL2
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orr x0, x0, x2

arch/arm64/kvm/hyp/nvhe/hyp-init.S

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@@ -214,8 +214,6 @@ SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu)
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bl __kvm_init_el2_state
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__init_el2_nvhe_prepare_eret
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/* Enable MMU, set vectors and stack. */
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mov x0, x28
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bl ___kvm_hyp_init // Clobbers x0..x2

arch/arm64/kvm/hyp/nvhe/psci-relay.c

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@@ -218,6 +218,9 @@ asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bool is_cpu_on)
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if (is_cpu_on)
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release_boot_args(boot_args);
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write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR);
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write_sysreg(INIT_PSTATE_EL1, SPSR_EL2);
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__host_enter(host_ctxt);
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}
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