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ice: add TSPLL log config helper
JIRA: https://issues.redhat.com/browse/RHEL-104246 Upstream commit(s): commit 0dffcea Author: Karol Kolacinski <karol.kolacinski@intel.com> Date: Thu May 1 15:54:17 2025 -0700 ice: add TSPLL log config helper Add a helper function to print new/current TSPLL config. This helps avoid unnecessary casts from u8 to enums. Reviewed-by: Michal Kubiak <michal.kubiak@intel.com> Reviewed-by: Milena Olech <milena.olech@intel.com> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com> Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Petr Oros <poros@redhat.com>
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drivers/net/ethernet/intel/ice/ice_tspll.c

Lines changed: 30 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,26 @@ static const char *ice_tspll_clk_src_str(enum ice_clk_src clk_src)
8989
}
9090
}
9191

92+
/**
93+
* ice_tspll_log_cfg - Log current/new TSPLL configuration
94+
* @hw: Pointer to the HW struct
95+
* @enable: CGU enabled/disabled
96+
* @clk_src: Current clock source
97+
* @tspll_freq: Current clock frequency
98+
* @lock: CGU lock status
99+
* @new_cfg: true if this is a new config
100+
*/
101+
static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src,
102+
u8 tspll_freq, bool lock, bool new_cfg)
103+
{
104+
dev_dbg(ice_hw_to_dev(hw),
105+
"%s TSPLL configuration -- %s, src %s, freq %s, PLL %s\n",
106+
new_cfg ? "New" : "Current", str_enabled_disabled(enable),
107+
ice_tspll_clk_src_str((enum ice_clk_src)clk_src),
108+
ice_tspll_clk_freq_str((enum ice_tspll_freq)tspll_freq),
109+
lock ? "locked" : "unlocked");
110+
}
111+
92112
/**
93113
* ice_tspll_cfg_e82x - Configure the Clock Generation Unit TSPLL
94114
* @hw: Pointer to the HW struct
@@ -144,12 +164,9 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
144164
if (err)
145165
return err;
146166

147-
/* Log the current clock configuration */
148-
ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
149-
str_enabled_disabled(dw24.ts_pll_enable),
150-
ice_tspll_clk_src_str(dw24.time_ref_sel),
151-
ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
152-
bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
167+
ice_tspll_log_cfg(hw, dw24.ts_pll_enable, dw24.time_ref_sel,
168+
dw9.time_ref_freq_sel, bwm_lf.plllock_true_lock_cri,
169+
false);
153170

154171
/* Disable the PLL before changing the clock source or frequency */
155172
if (dw24.ts_pll_enable) {
@@ -222,12 +239,8 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
222239
return -EBUSY;
223240
}
224241

225-
/* Log the current clock configuration */
226-
ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
227-
str_enabled_disabled(dw24.ts_pll_enable),
228-
ice_tspll_clk_src_str(dw24.time_ref_sel),
229-
ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
230-
bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
242+
ice_tspll_log_cfg(hw, dw24.ts_pll_enable, clk_src, clk_freq, true,
243+
true);
231244

232245
return 0;
233246
}
@@ -316,12 +329,9 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
316329
if (err)
317330
return err;
318331

319-
/* Log the current clock configuration */
320-
ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
321-
str_enabled_disabled(dw23.ts_pll_enable),
322-
ice_tspll_clk_src_str(dw23.time_ref_sel),
323-
ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
324-
ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
332+
ice_tspll_log_cfg(hw, dw23.ts_pll_enable, dw23.time_ref_sel,
333+
dw9.time_ref_freq_sel,
334+
ro_lock.plllock_true_lock_cri, false);
325335

326336
/* Disable the PLL before changing the clock source or frequency */
327337
if (dw23.ts_pll_enable) {
@@ -414,12 +424,8 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
414424
return -EBUSY;
415425
}
416426

417-
/* Log the current clock configuration */
418-
ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
419-
str_enabled_disabled(dw23.ts_pll_enable),
420-
ice_tspll_clk_src_str(dw23.time_ref_sel),
421-
ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
422-
ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
427+
ice_tspll_log_cfg(hw, dw23.ts_pll_enable, clk_src, clk_freq, true,
428+
true);
423429

424430
return 0;
425431
}

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