x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS_CORES

jira LE-4694
Rebuild_History Non-Buildable kernel-6.12.0-55.43.1.el10_0
commit-author Perry Yuan <perry.yuan@amd.com>
commit 1ad4667
Empty-Commit: Cherry-Pick Conflicts during history rebuild.
Will be included in final tarball splat. Ref for failed cherry-pick at:
ciq/ciq_backports/kernel-6.12.0-55.43.1.el10_0/1ad46670.failed

CPUID leaf 0x80000026 advertises core types with different efficiency
rankings.

Bit 30 indicates the heterogeneous core topology feature, if the bit
set, it means not all instances at the current hierarchical level have
the same core topology.

This is described in the AMD64 Architecture Programmers Manual Volume
2 and 3, doc ID #25493 and #25494.

	Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
	Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
	Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20241025171459.1093-3-mario.limonciello@amd.com
(cherry picked from commit 1ad4667)
	Signed-off-by: Jonathan Maple <jmaple@ciq.com>

# Conflicts:
#	arch/x86/include/asm/cpufeatures.h

Author: PlaidCat

ciq/ciq_backports/kernel-6.12.0-55.43.1.el10_0/1ad46670.failed

@@ -0,0 +1,60 @@
+x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS_CORES
+
+jira LE-4694
+Rebuild_History Non-Buildable kernel-6.12.0-55.43.1.el10_0
+commit-author Perry Yuan <perry.yuan@amd.com>
+commit 1ad466706671436994ec7e71305f44692fed989a
+Empty-Commit: Cherry-Pick Conflicts during history rebuild.
+Will be included in final tarball splat. Ref for failed cherry-pick at:
+ciq/ciq_backports/kernel-6.12.0-55.43.1.el10_0/1ad46670.failed
+
+CPUID leaf 0x80000026 advertises core types with different efficiency
+rankings.
+
+Bit 30 indicates the heterogeneous core topology feature, if the bit
+set, it means not all instances at the current hierarchical level have
+the same core topology.
+
+This is described in the AMD64 Architecture Programmers Manual Volume
+2 and 3, doc ID #25493 and #25494.
+
+	Signed-off-by: Perry Yuan <perry.yuan@amd.com>
+Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
+	Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+	Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Link: https://lore.kernel.org/r/20241025171459.1093-3-mario.limonciello@amd.com
+(cherry picked from commit 1ad466706671436994ec7e71305f44692fed989a)
+	Signed-off-by: Jonathan Maple <jmaple@ciq.com>
+
+# Conflicts:
+#	arch/x86/include/asm/cpufeatures.h
+diff --cc arch/x86/include/asm/cpufeatures.h
+index d96277dceabf,1216a0588ba8..000000000000
+--- a/arch/x86/include/asm/cpufeatures.h
++++ b/arch/x86/include/asm/cpufeatures.h
+@@@ -476,7 -472,8 +476,12 @@@
+  #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* BHI_DIS_S HW control available */
+  #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
+  #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
+++<<<<<<< HEAD
+ +#define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* AMD Fast CPPC */
+++=======
++ #define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */
++ #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
+++>>>>>>> 1ad466706671 (x86/cpufeatures: Add X86_FEATURE_AMD_HETEROGENEOUS_CORES)
+  
+  /*
+   * BUG word(s)
+* Unmerged path arch/x86/include/asm/cpufeatures.h
+diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
+index c84c30188fdf..2792fa29dbed 100644
+--- a/arch/x86/kernel/cpu/scattered.c
++++ b/arch/x86/kernel/cpu/scattered.c
+@@ -52,6 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
+ 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
+ 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
+ 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
++	{ X86_FEATURE_AMD_HETEROGENEOUS_CORES,	CPUID_EAX,  30, 0x80000026, 0 },
+ 	{ 0, 0, 0, 0, 0 }
+ };
+