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crypto: X86 - Remove CONFIG_AS_VAES
Current minimum required version of binutils is 2.30, which supports VAES instruction mnemonics. Remove check for assembler support of VAES instructions and all relevant macros for conditional compilation. No functional change intended. Signed-off-by: Uros Bizjak <ubizjak@gmail.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Link: https://lore.kernel.org/20250819085855.333380-2-ubizjak@gmail.com
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-17
lines changed

5 files changed

+12
-17
lines changed

arch/x86/Kconfig.assembler

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,6 @@ config AS_AVX512
66
help
77
Supported by binutils >= 2.25 and LLVM integrated assembler
88

9-
config AS_VAES
10-
def_bool $(as-instr,vaesenc %ymm0$(comma)%ymm1$(comma)%ymm2)
11-
help
12-
Supported by binutils >= 2.30 and LLVM integrated assembler
13-
149
config AS_VPCLMULQDQ
1510
def_bool $(as-instr,vpclmulqdq \$0x10$(comma)%ymm0$(comma)%ymm1$(comma)%ymm2)
1611
help

arch/x86/crypto/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
4747
aesni-intel-$(CONFIG_64BIT) += aes-ctr-avx-x86_64.o \
4848
aes-gcm-aesni-x86_64.o \
4949
aes-xts-avx-x86_64.o
50-
ifeq ($(CONFIG_AS_VAES)$(CONFIG_AS_VPCLMULQDQ),yy)
50+
ifeq ($(CONFIG_AS_VPCLMULQDQ),y)
5151
aesni-intel-$(CONFIG_64BIT) += aes-gcm-avx10-x86_64.o
5252
endif
5353

arch/x86/crypto/aes-ctr-avx-x86_64.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -552,7 +552,7 @@ SYM_TYPED_FUNC_START(aes_xctr_crypt_aesni_avx)
552552
_aes_ctr_crypt 1
553553
SYM_FUNC_END(aes_xctr_crypt_aesni_avx)
554554

555-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
555+
#if defined(CONFIG_AS_VPCLMULQDQ)
556556
.set VL, 32
557557
.set USE_AVX512, 0
558558
SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx2)
@@ -570,4 +570,4 @@ SYM_FUNC_END(aes_ctr64_crypt_vaes_avx512)
570570
SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx512)
571571
_aes_ctr_crypt 1
572572
SYM_FUNC_END(aes_xctr_crypt_vaes_avx512)
573-
#endif // CONFIG_AS_VAES && CONFIG_AS_VPCLMULQDQ
573+
#endif // CONFIG_AS_VPCLMULQDQ

arch/x86/crypto/aes-xts-avx-x86_64.S

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -886,7 +886,7 @@ SYM_TYPED_FUNC_START(aes_xts_decrypt_aesni_avx)
886886
_aes_xts_crypt 0
887887
SYM_FUNC_END(aes_xts_decrypt_aesni_avx)
888888

889-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
889+
#if defined(CONFIG_AS_VPCLMULQDQ)
890890
.set VL, 32
891891
.set USE_AVX512, 0
892892
SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx2)
@@ -904,4 +904,4 @@ SYM_FUNC_END(aes_xts_encrypt_vaes_avx512)
904904
SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx512)
905905
_aes_xts_crypt 0
906906
SYM_FUNC_END(aes_xts_decrypt_vaes_avx512)
907-
#endif /* CONFIG_AS_VAES && CONFIG_AS_VPCLMULQDQ */
907+
#endif /* CONFIG_AS_VPCLMULQDQ */

arch/x86/crypto/aesni-intel_glue.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -828,7 +828,7 @@ static struct skcipher_alg skcipher_algs_##suffix[] = {{ \
828828
}}
829829

830830
DEFINE_AVX_SKCIPHER_ALGS(aesni_avx, "aesni-avx", 500);
831-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
831+
#if defined(CONFIG_AS_VPCLMULQDQ)
832832
DEFINE_AVX_SKCIPHER_ALGS(vaes_avx2, "vaes-avx2", 600);
833833
DEFINE_AVX_SKCIPHER_ALGS(vaes_avx512, "vaes-avx512", 800);
834834
#endif
@@ -912,7 +912,7 @@ struct aes_gcm_key_avx10 {
912912
#define FLAG_RFC4106 BIT(0)
913913
#define FLAG_ENC BIT(1)
914914
#define FLAG_AVX BIT(2)
915-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
915+
#if defined(CONFIG_AS_VPCLMULQDQ)
916916
# define FLAG_AVX10_256 BIT(3)
917917
# define FLAG_AVX10_512 BIT(4)
918918
#else
@@ -1519,7 +1519,7 @@ DEFINE_GCM_ALGS(aesni_avx, FLAG_AVX,
15191519
"generic-gcm-aesni-avx", "rfc4106-gcm-aesni-avx",
15201520
AES_GCM_KEY_AESNI_SIZE, 500);
15211521

1522-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
1522+
#if defined(CONFIG_AS_VPCLMULQDQ)
15231523
/* aes_gcm_algs_vaes_avx10_256 */
15241524
DEFINE_GCM_ALGS(vaes_avx10_256, FLAG_AVX10_256,
15251525
"generic-gcm-vaes-avx10_256", "rfc4106-gcm-vaes-avx10_256",
@@ -1529,7 +1529,7 @@ DEFINE_GCM_ALGS(vaes_avx10_256, FLAG_AVX10_256,
15291529
DEFINE_GCM_ALGS(vaes_avx10_512, FLAG_AVX10_512,
15301530
"generic-gcm-vaes-avx10_512", "rfc4106-gcm-vaes-avx10_512",
15311531
AES_GCM_KEY_AVX10_SIZE, 800);
1532-
#endif /* CONFIG_AS_VAES && CONFIG_AS_VPCLMULQDQ */
1532+
#endif /* CONFIG_AS_VPCLMULQDQ */
15331533

15341534
static int __init register_avx_algs(void)
15351535
{
@@ -1551,7 +1551,7 @@ static int __init register_avx_algs(void)
15511551
* Similarly, the assembler support was added at about the same time.
15521552
* For simplicity, just always check for VAES and VPCLMULQDQ together.
15531553
*/
1554-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
1554+
#if defined(CONFIG_AS_VPCLMULQDQ)
15551555
if (!boot_cpu_has(X86_FEATURE_AVX2) ||
15561556
!boot_cpu_has(X86_FEATURE_VAES) ||
15571557
!boot_cpu_has(X86_FEATURE_VPCLMULQDQ) ||
@@ -1592,7 +1592,7 @@ static int __init register_avx_algs(void)
15921592
ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512));
15931593
if (err)
15941594
return err;
1595-
#endif /* CONFIG_AS_VAES && CONFIG_AS_VPCLMULQDQ */
1595+
#endif /* CONFIG_AS_VPCLMULQDQ */
15961596
return 0;
15971597
}
15981598

@@ -1607,7 +1607,7 @@ static void unregister_avx_algs(void)
16071607
{
16081608
unregister_skciphers(skcipher_algs_aesni_avx);
16091609
unregister_aeads(aes_gcm_algs_aesni_avx);
1610-
#if defined(CONFIG_AS_VAES) && defined(CONFIG_AS_VPCLMULQDQ)
1610+
#if defined(CONFIG_AS_VPCLMULQDQ)
16111611
unregister_skciphers(skcipher_algs_vaes_avx2);
16121612
unregister_skciphers(skcipher_algs_vaes_avx512);
16131613
unregister_aeads(aes_gcm_algs_vaes_avx10_256);

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