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crypto: octeontx2 - remove CPT block reset
JIRA: https://issues.redhat.com/browse/RHEL-31478 Upstream Status: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git commit 711b2e2 Author: Srujana Challa <schalla@marvell.com> Date: Wed Dec 13 13:00:47 2023 +0530 crypto: octeontx2 - remove CPT block reset CPT block reset in CPT PF erase all the CPT configuration which is done in AF driver init. So, remove CPT block reset from CPT PF as it is also being done in AF init and not required in PF. Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Štěpán Horáček <shoracek@redhat.com>
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drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c

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Original file line numberDiff line numberDiff line change
@@ -587,45 +587,6 @@ static int cpt_is_pf_usable(struct otx2_cptpf_dev *cptpf)
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return 0;
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}
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static int cptx_device_reset(struct otx2_cptpf_dev *cptpf, int blkaddr)
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{
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int timeout = 10, ret;
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u64 reg = 0;
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ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev,
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CPT_AF_BLK_RST, 0x1, blkaddr);
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if (ret)
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return ret;
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do {
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ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev,
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CPT_AF_BLK_RST, &reg, blkaddr);
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if (ret)
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return ret;
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if (!((reg >> 63) & 0x1))
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break;
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usleep_range(10000, 20000);
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if (timeout-- < 0)
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return -EBUSY;
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} while (1);
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return ret;
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}
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static int cptpf_device_reset(struct otx2_cptpf_dev *cptpf)
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{
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int ret = 0;
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if (cptpf->has_cpt1) {
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ret = cptx_device_reset(cptpf, BLKADDR_CPT1);
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if (ret)
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return ret;
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}
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return cptx_device_reset(cptpf, BLKADDR_CPT0);
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}
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static void cptpf_check_block_implemented(struct otx2_cptpf_dev *cptpf)
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{
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u64 cfg;
@@ -643,10 +604,6 @@ static int cptpf_device_init(struct otx2_cptpf_dev *cptpf)
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/* check if 'implemented' bit is set for block BLKADDR_CPT1 */
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cptpf_check_block_implemented(cptpf);
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/* Reset the CPT PF device */
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ret = cptpf_device_reset(cptpf);
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if (ret)
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return ret;
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/* Get number of SE, IE and AE engines */
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ret = otx2_cpt_read_af_reg(&cptpf->afpf_mbox, cptpf->pdev,

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