Skip to content

Commit 22f2c84

Browse files
author
Steve Dunnagan
committed
arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ
JIRA: https://issues.redhat.com/browse/RHEL-53987 commit ecbc520 Author: Geert Uytterhoeven <geert+renesas@glider.be> Date: Thu Jun 20 15:57:35 2024 +0200 arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ Add the missing fifth interrupt to the device node that represents the ARM architected timer. While at it, add an interrupt-names property for clarity, Fixes: 68a4552 ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be (cherry picked from commit ecbc520) Signed-off-by: Steve Dunnagan <sdunnaga@redhat.com>
1 parent 265c82b commit 22f2c84

File tree

1 file changed

+4
-1
lines changed

1 file changed

+4
-1
lines changed

arch/arm64/boot/dts/renesas/r9a07g044.dtsi

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,9 @@
127127
interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
128128
<&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
129129
<&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
130-
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
130+
<&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
131+
<&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
132+
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
133+
"hyp-virt";
131134
};
132135
};

0 commit comments

Comments
 (0)