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dvdgomezPlaidCat
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x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n
jira LE-958 cve-prereq CVE-2022-26373 commit b2620fa If a kernel is built with CONFIG_RETPOLINE=n, but the user still wants to mitigate Spectre v2 using IBRS or eIBRS, the RSB filling will be silently disabled. There's nothing retpoline-specific about RSB buffer filling. Remove the CONFIG_RETPOLINE guards around it. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> (cherry picked from commit b2620fa) Signed-off-by: David Gomez <dgomez@ciq.com>
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arch/x86/entry/entry_32.S

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@@ -739,7 +739,6 @@ ENTRY(__switch_to_asm)
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movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
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#endif
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#ifdef CONFIG_RETPOLINE
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/*
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* When switching from a shallower to a deeper call stack
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* the RSB may either underflow or use entries populated
@@ -748,7 +747,6 @@ ENTRY(__switch_to_asm)
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* speculative execution to prevent attack.
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*/
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FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
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#endif
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/* restore callee-saved registers */
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popfl

arch/x86/entry/entry_64.S

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@@ -269,7 +269,6 @@ SYM_FUNC_START(__switch_to_asm)
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movq %rbx, PER_CPU_VAR(fixed_percpu_data) + stack_canary_offset
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#endif
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#ifdef CONFIG_RETPOLINE
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/*
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* When switching from a shallower to a deeper call stack
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* the RSB may either underflow or use entries populated
@@ -278,7 +277,6 @@ SYM_FUNC_START(__switch_to_asm)
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* speculative execution to prevent attack.
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*/
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FILL_RETURN_BUFFER %r12, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
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#endif
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/* restore callee-saved registers */
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popfq

arch/x86/include/asm/nospec-branch.h

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@@ -149,11 +149,9 @@
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* monstrosity above, manually.
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*/
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.macro FILL_RETURN_BUFFER reg:req nr:req ftr:req
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#ifdef CONFIG_RETPOLINE
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ALTERNATIVE "jmp .Lskip_rsb_\@", "", \ftr
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__FILL_RETURN_BUFFER(\reg,\nr,%_ASM_SP)
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.Lskip_rsb_\@:
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#endif
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.endm
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#ifdef CONFIG_CPU_UNRET_ENTRY

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