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Merge: platform/x86: intel/pmc: updates for 6.15
MR: https://gitlab.com/redhat/centos-stream/src/kernel/centos-stream-10/-/merge_requests/647 Description: Update drivers/platform/x86/pmc includes support for Arrow Lake U/H support and Panther Lake support JIRA: https://issues.redhat.com/browse/RHEL-47465 Build Info: 67156193 Tested: Successful platform test results on Intel (intel-pantherlake-h-02) system. Signed-off-by: Steve Best <sbest@redhat.com> Approved-by: Tony Camuso <tcamuso@redhat.com> Approved-by: David Arcari <darcari@redhat.com> Approved-by: CKI KWF Bot <cki-ci-bot+kwf-gitlab-com@redhat.com> Merged-by: Julio Faracco <jfaracco@redhat.com>
2 parents fe0d629 + 7509c5d commit 2105604

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‎drivers/platform/x86/intel/pmc/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
#
55

66
intel_pmc_core-y := core.o core_ssram.o spt.o cnp.o \
7-
icl.o tgl.o adl.o mtl.o arl.o lnl.o
7+
icl.o tgl.o adl.o mtl.o arl.o lnl.o ptl.o
88
obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o
99
intel_pmc_core_pltdrv-y := pltdrv.o
1010
obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core_pltdrv.o

‎drivers/platform/x86/intel/pmc/adl.c‎

Lines changed: 22 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
#include "core.h"
1212

1313
/* Alder Lake: PGD PFET Enable Ack Status Register(s) bitmap */
14-
const struct pmc_bit_map adl_pfear_map[] = {
14+
static const struct pmc_bit_map adl_pfear_map[] = {
1515
{"SPI/eSPI", BIT(2)},
1616
{"XHCI", BIT(3)},
1717
{"SPA", BIT(4)},
@@ -54,7 +54,7 @@ const struct pmc_bit_map adl_pfear_map[] = {
5454
{}
5555
};
5656

57-
const struct pmc_bit_map *ext_adl_pfear_map[] = {
57+
static const struct pmc_bit_map *ext_adl_pfear_map[] = {
5858
/*
5959
* Check intel_pmc_core_ids[] users of cnp_reg_map for
6060
* a list of core SoCs using this.
@@ -63,7 +63,7 @@ const struct pmc_bit_map *ext_adl_pfear_map[] = {
6363
NULL
6464
};
6565

66-
const struct pmc_bit_map adl_ltr_show_map[] = {
66+
static const struct pmc_bit_map adl_ltr_show_map[] = {
6767
{"SOUTHPORT_A", CNP_PMC_LTR_SPA},
6868
{"SOUTHPORT_B", CNP_PMC_LTR_SPB},
6969
{"SATA", CNP_PMC_LTR_SATA},
@@ -100,7 +100,7 @@ const struct pmc_bit_map adl_ltr_show_map[] = {
100100
{}
101101
};
102102

103-
const struct pmc_bit_map adl_clocksource_status_map[] = {
103+
static const struct pmc_bit_map adl_clocksource_status_map[] = {
104104
{"CLKPART1_OFF_STS", BIT(0)},
105105
{"CLKPART2_OFF_STS", BIT(1)},
106106
{"CLKPART3_OFF_STS", BIT(2)},
@@ -128,7 +128,7 @@ const struct pmc_bit_map adl_clocksource_status_map[] = {
128128
{}
129129
};
130130

131-
const struct pmc_bit_map adl_power_gating_status_0_map[] = {
131+
static const struct pmc_bit_map adl_power_gating_status_0_map[] = {
132132
{"PMC_PGD0_PG_STS", BIT(0)},
133133
{"DMI_PGD0_PG_STS", BIT(1)},
134134
{"ESPISPI_PGD0_PG_STS", BIT(2)},
@@ -158,7 +158,7 @@ const struct pmc_bit_map adl_power_gating_status_0_map[] = {
158158
{}
159159
};
160160

161-
const struct pmc_bit_map adl_power_gating_status_1_map[] = {
161+
static const struct pmc_bit_map adl_power_gating_status_1_map[] = {
162162
{"USBR0_PGD0_PG_STS", BIT(0)},
163163
{"SMT1_PGD0_PG_STS", BIT(2)},
164164
{"CSMERTC_PGD0_PG_STS", BIT(6)},
@@ -170,14 +170,14 @@ const struct pmc_bit_map adl_power_gating_status_1_map[] = {
170170
{}
171171
};
172172

173-
const struct pmc_bit_map adl_power_gating_status_2_map[] = {
173+
static const struct pmc_bit_map adl_power_gating_status_2_map[] = {
174174
{"THC0_PGD0_PG_STS", BIT(7)},
175175
{"THC1_PGD0_PG_STS", BIT(8)},
176176
{"SPF_PGD0_PG_STS", BIT(14)},
177177
{}
178178
};
179179

180-
const struct pmc_bit_map adl_d3_status_0_map[] = {
180+
static const struct pmc_bit_map adl_d3_status_0_map[] = {
181181
{"ISH_D3_STS", BIT(2)},
182182
{"LPSS_D3_STS", BIT(3)},
183183
{"XDCI_D3_STS", BIT(4)},
@@ -193,13 +193,13 @@ const struct pmc_bit_map adl_d3_status_0_map[] = {
193193
{}
194194
};
195195

196-
const struct pmc_bit_map adl_d3_status_1_map[] = {
196+
static const struct pmc_bit_map adl_d3_status_1_map[] = {
197197
{"GBE_D3_STS", BIT(19)},
198198
{"CNVI_D3_STS", BIT(27)},
199199
{}
200200
};
201201

202-
const struct pmc_bit_map adl_d3_status_2_map[] = {
202+
static const struct pmc_bit_map adl_d3_status_2_map[] = {
203203
{"CSMERTC_D3_STS", BIT(1)},
204204
{"CSE_D3_STS", BIT(4)},
205205
{"KVMCC_D3_STS", BIT(5)},
@@ -210,20 +210,20 @@ const struct pmc_bit_map adl_d3_status_2_map[] = {
210210
{}
211211
};
212212

213-
const struct pmc_bit_map adl_d3_status_3_map[] = {
213+
static const struct pmc_bit_map adl_d3_status_3_map[] = {
214214
{"THC0_D3_STS", BIT(14)},
215215
{"THC1_D3_STS", BIT(15)},
216216
{}
217217
};
218218

219-
const struct pmc_bit_map adl_vnn_req_status_0_map[] = {
219+
static const struct pmc_bit_map adl_vnn_req_status_0_map[] = {
220220
{"ISH_VNN_REQ_STS", BIT(2)},
221221
{"ESPISPI_VNN_REQ_STS", BIT(18)},
222222
{"DSP_VNN_REQ_STS", BIT(19)},
223223
{}
224224
};
225225

226-
const struct pmc_bit_map adl_vnn_req_status_1_map[] = {
226+
static const struct pmc_bit_map adl_vnn_req_status_1_map[] = {
227227
{"NPK_VNN_REQ_STS", BIT(4)},
228228
{"EXI_VNN_REQ_STS", BIT(9)},
229229
{"GBE_VNN_REQ_STS", BIT(19)},
@@ -232,7 +232,7 @@ const struct pmc_bit_map adl_vnn_req_status_1_map[] = {
232232
{}
233233
};
234234

235-
const struct pmc_bit_map adl_vnn_req_status_2_map[] = {
235+
static const struct pmc_bit_map adl_vnn_req_status_2_map[] = {
236236
{"CSMERTC_VNN_REQ_STS", BIT(1)},
237237
{"CSE_VNN_REQ_STS", BIT(4)},
238238
{"SMT1_VNN_REQ_STS", BIT(8)},
@@ -245,12 +245,12 @@ const struct pmc_bit_map adl_vnn_req_status_2_map[] = {
245245
{}
246246
};
247247

248-
const struct pmc_bit_map adl_vnn_req_status_3_map[] = {
248+
static const struct pmc_bit_map adl_vnn_req_status_3_map[] = {
249249
{"GPIOCOM5_VNN_REQ_STS", BIT(11)},
250250
{}
251251
};
252252

253-
const struct pmc_bit_map adl_vnn_misc_status_map[] = {
253+
static const struct pmc_bit_map adl_vnn_misc_status_map[] = {
254254
{"CPU_C10_REQ_STS", BIT(0)},
255255
{"PCIe_LPM_En_REQ_STS", BIT(3)},
256256
{"ITH_REQ_STS", BIT(5)},
@@ -265,7 +265,7 @@ const struct pmc_bit_map adl_vnn_misc_status_map[] = {
265265
{}
266266
};
267267

268-
const struct pmc_bit_map *adl_lpm_maps[] = {
268+
static const struct pmc_bit_map *adl_lpm_maps[] = {
269269
adl_clocksource_status_map,
270270
adl_power_gating_status_0_map,
271271
adl_power_gating_status_1_map,
@@ -311,20 +311,8 @@ const struct pmc_reg_map adl_reg_map = {
311311
.pson_residency_counter_step = TGL_PSON_RES_COUNTER_STEP,
312312
};
313313

314-
int adl_core_init(struct pmc_dev *pmcdev)
315-
{
316-
struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN];
317-
int ret;
318-
319-
pmcdev->suspend = cnl_suspend;
320-
pmcdev->resume = cnl_resume;
321-
322-
pmc->map = &adl_reg_map;
323-
ret = get_primary_reg_base(pmc);
324-
if (ret)
325-
return ret;
326-
327-
pmc_core_get_low_power_modes(pmcdev);
328-
329-
return 0;
330-
}
314+
struct pmc_dev_info adl_pmc_dev = {
315+
.map = &adl_reg_map,
316+
.suspend = cnl_suspend,
317+
.resume = cnl_resume,
318+
};

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