Skip to content

Commit 500b100

Browse files
committed
Requested changes
1 parent dab3604 commit 500b100

File tree

2 files changed

+5
-5
lines changed

2 files changed

+5
-5
lines changed

simavr/sim/avr_spi.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -49,20 +49,22 @@ static uint8_t avr_spi_read(struct avr_t * avr, avr_io_addr_t addr, void * param
4949

5050
static void avr_spi_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
5151
{
52+
53+
static const uint8_t _avr_spi_clkdiv[4] = {4,16,64,128};
5254
avr_spi_t * p = (avr_spi_t *)param;
5355

5456
if (addr == p->r_spdr) {
5557
/* Clear the SPIF bit. See ATmega164/324/644 manual, Section 18.5.2. */
5658
avr_regbit_clear(avr, p->spi.raised);
5759

5860
avr_core_watch_write(avr, addr, v);
59-
uint16_t uiClkShift = _avr_spi_clkdiv[avr->data[p->r_spcr]&0b11];
61+
uint16_t clock_shift = _avr_spi_clkdiv[avr->data[p->r_spcr]&0b11];
6062
// If master && 2X, double rate (half divisor)
6163
if (avr_regbit_get(avr, p->mstr) && avr_regbit_get(avr, p->spr[2]))
62-
uiClkShift>>=1;
64+
clock_shift>>=1;
6365

6466
// We can wait directly in clockshifts, it is a divisor, so /4 means 4 avr cycles to clock out one bit.
65-
avr_cycle_timer_register(avr, uiClkShift<<3, avr_spi_raise, p); // *8 since 8 clocks to a byte.
67+
avr_cycle_timer_register(avr, clock_shift<<3, avr_spi_raise, p); // *8 since 8 clocks to a byte.
6668
}
6769
}
6870

simavr/sim/avr_spi.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,4 @@ void avr_spi_init(avr_t * avr, avr_spi_t * port);
104104
};
105105
#endif
106106

107-
static const uint8_t _avr_spi_clkdiv[4] = {4,16,64,128};
108-
109107
#endif /*__AVR_SPI_H__*/

0 commit comments

Comments
 (0)