@@ -102,11 +102,7 @@ static void avr_bitbang_write_bit(avr_bitbang_t *p)
102102 if ( p -> p_out .port ) {
103103 avr_raise_irq (p -> p_out .irq , bit );
104104 uint16_t addr = p -> p_out .ioport -> r_port ;
105- uint8_t value = p -> avr -> data [addr ];
106- if (bit )
107- value |= 1 << p -> p_out .pin ;
108- else
109- value &= ~(1 << p -> p_out .pin );
105+ uint8_t value = (p -> avr -> data [addr ] & ~(1 << p -> p_out .pin )) | (!!bit << p -> p_out .pin );
110106 // at least avr->data[addr] update is required, otherwise port state is broken
111107 // also triggering vcd signal would be nice here
112108 avr_core_watch_write (p -> avr , addr , value );
@@ -142,11 +138,7 @@ static void avr_bitbang_clk_edge(avr_bitbang_t *p)
142138 if ( p -> clk_generate && p -> p_clk .port ) {
143139 avr_raise_irq (p -> p_clk .irq , clk );
144140 uint16_t addr = p -> p_clk .ioport -> r_port ;
145- uint8_t value = p -> avr -> data [addr ];
146- if (clk )
147- value |= 1 << p -> p_clk .pin ;
148- else
149- value &= ~(1 << p -> p_clk .pin );
141+ uint8_t value = (p -> avr -> data [addr ] & ~(1 << p -> p_clk .pin )) | (!!clk << p -> p_clk .pin );
150142 // at least avr->data[addr] update is required, otherwise port state is broken
151143 // also triggering vcd signal would be nice here
152144 avr_core_watch_write (p -> avr , addr , value );
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