fix register definitions EXAMPLE_IREG length to 1 in TCP and RTU example

brainelectronics · brainelectronics · commit 6c5820f9118f · 2023-01-06T16:47:42.000+01:00
diff --git a/examples/rtu_client_example.py b/examples/rtu_client_example.py
@@ -88,7 +88,7 @@
     "IREGS": {
         "EXAMPLE_IREG": {
             "register": 10,
-            "len": 2,
+            "len": 1,
             "val": 60001
         }
     }
diff --git a/examples/rtu_host_example.py b/examples/rtu_host_example.py
@@ -92,7 +92,7 @@
     "IREGS": {
         "EXAMPLE_IREG": {
             "register": 10,
-            "len": 2,
+            "len": 1,
             "val": 60001
         }
     }
diff --git a/examples/tcp_client_example.py b/examples/tcp_client_example.py
@@ -157,7 +157,7 @@ def reset_data_registers_cb(reg_type, address, val):
     "IREGS": {
         "EXAMPLE_IREG": {
             "register": 10,
-            "len": 2,
+            "len": 1,
             "val": 60001
         }
     }
diff --git a/examples/tcp_host_example.py b/examples/tcp_host_example.py
@@ -101,7 +101,7 @@
     "IREGS": {
         "EXAMPLE_IREG": {
             "register": 10,
-            "len": 2,
+            "len": 1,
             "val": 60001
         }
     }

Original file line number	Diff line number	Diff line change
`@@ -157,7 +157,7 @@ def reset_data_registers_cb(reg_type, address, val):`
`157`	`157`	`"IREGS": {`
`158`	`158`	`"EXAMPLE_IREG": {`
`159`	`159`	`"register": 10,`
`160`		`- "len": 2,`
	`160`	`+ "len": 1,`
`161`	`161`	`"val": 60001`
`162`	`162`	`}`
`163`	`163`	`}`