memory: tegra: Skip SID programming if SID registers aren't set

PlaidCat · PlaidCat · commit e1d38b16a1e3 · 2024-09-12T13:20:34.000-04:00
jira LE-1907 Rebuild_History Non-Buildable kernel-5.14.0-427.16.1.el9_4 commit-author Ashish Mhetre <amhetre@nvidia.com> commit 0d6c918 There are few MC clients where SID security and override register offsets are not specified like "sw_cluster0" in tegra234. Don't program SID override for such clients because it leads to access to invalid addresses. Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Link: https://lore.kernel.org/r/20231107112713.21399-2-amhetre@nvidia.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (cherry picked from commit 0d6c918) Signed-off-by: Jonathan Maple <jmaple@ciq.com>
diff --git a/drivers/memory/tegra/tegra186.c b/drivers/memory/tegra/tegra186.c
@@ -74,6 +74,9 @@ static void tegra186_mc_client_sid_override(struct tegra_mc *mc,
 {
 	u32 value, old;
 
+	if (client->regs.sid.security == 0 && client->regs.sid.override == 0)
+		return;
+
 	value = readl(mc->regs + client->regs.sid.security);
 	if ((value & MC_SID_STREAMID_SECURITY_OVERRIDE) == 0) {
 		/*

Original file line number	Diff line number	Diff line change
`@@ -74,6 +74,9 @@ static void tegra186_mc_client_sid_override(struct tegra_mc *mc,`
`74`	`74`	`{`
`75`	`75`	`u32 value, old;`
`76`	`76`
	`77`	`+ if (client->regs.sid.security == 0 && client->regs.sid.override == 0)`
	`78`	`+ return;`
	`79`	`+`
`77`	`80`	`value = readl(mc->regs + client->regs.sid.security);`
`78`	`81`	`if ((value & MC_SID_STREAMID_SECURITY_OVERRIDE) == 0) {`
`79`	`82`	`/*`