From e133f4c28341c95fa9f44c1a9d424741bcd19907 Mon Sep 17 00:00:00 2001 From: jarparrish Date: Wed, 2 Dec 2020 21:02:19 -0700 Subject: [PATCH 1/6] day one mvp --- ls8/cpu.py | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 9a307496e..c7ab05451 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -7,7 +7,21 @@ class CPU: def __init__(self): """Construct a new CPU.""" - pass + self.ram = [0] * 256 + self.pc = 0 + self.fl = 0 + self.running = True + self.reg = [0, 0, 0, 0 , 0, 0, 0, 0xF4] + + self.HLT = 0b00000001 + self.LDI = 0b10000010 + self.PRN = 0b01000111 + + def ram_read(self, pc): + return self.ram[pc] + + def ram_write(self, pc, val): + self.ram[pc] = val def load(self): """Load a program into memory.""" @@ -62,4 +76,22 @@ def trace(self): def run(self): """Run the CPU.""" - pass + while self.running == True: + instruction = self.ram_read(self.pc) + + + if instruction == self.PRN: + val_to_print = self.reg[self.pc + 1] + print(val_to_print) + self.pc += 1 + elif instruction == self.LDI: + reg_to_store = self.reg[self.pc + 1] + val_to_store = self.reg[self.pc + 2] + self.reg[reg_to_store] = val_to_store + self.pc += 2 + elif instruction == self.HLT: + self.running = False + else: + print(f"Instruction Unknown {instruction}") + sys.exit(1) + From e94b3c6788de51b62f36b4b9368cdfda2a25bdc7 Mon Sep 17 00:00:00 2001 From: jarparrish Date: Wed, 2 Dec 2020 21:24:26 -0700 Subject: [PATCH 2/6] some updates made - program working --- ls8/cpu.py | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index c7ab05451..e8ceb89b7 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -78,20 +78,25 @@ def run(self): """Run the CPU.""" while self.running == True: instruction = self.ram_read(self.pc) + #print('instruction', "{0:b}".format(instruction)) if instruction == self.PRN: - val_to_print = self.reg[self.pc + 1] - print(val_to_print) - self.pc += 1 + val_to_print = self.ram[self.pc + 1] + print(self.reg[val_to_print]) + self.pc += 2 + print('prn ran') elif instruction == self.LDI: - reg_to_store = self.reg[self.pc + 1] - val_to_store = self.reg[self.pc + 2] + reg_to_store = self.ram[self.pc + 1] + val_to_store = self.ram[self.pc + 2] self.reg[reg_to_store] = val_to_store - self.pc += 2 + self.pc += 3 + print('ldi ran') elif instruction == self.HLT: + print('hlt ran') self.running = False else: - print(f"Instruction Unknown {instruction}") + unknown_instruction = "{0:b}".format(instruction) + print(f"Instruction Unknown {unknown_instruction}") sys.exit(1) From a77010abd0c1235ab94e76273f6f212e93ac1896 Mon Sep 17 00:00:00 2001 From: jarparrish Date: Thu, 3 Dec 2020 20:04:34 -0700 Subject: [PATCH 3/6] implementation from class added along side my implementation --- ls8/cpu.py | 56 ++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 42 insertions(+), 14 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index e8ceb89b7..6e9544806 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -2,6 +2,10 @@ import sys +HLT = 0b00000001 +LDI = 0b10000010 +PRN = 0b01000111 + class CPU: """Main CPU class.""" @@ -11,17 +15,19 @@ def __init__(self): self.pc = 0 self.fl = 0 self.running = True - self.reg = [0, 0, 0, 0 , 0, 0, 0, 0xF4] - - self.HLT = 0b00000001 + self.halted = False + #self.reg = [0, 0, 0, 0, 0, 0, 0, 0xF4] + self.reg = [0] * 8 + self.reg[7] = 0xF4 + """ self.HLT = 0b00000001 self.LDI = 0b10000010 - self.PRN = 0b01000111 + self.PRN = 0b01000111 """ - def ram_read(self, pc): - return self.ram[pc] + def ram_read(self, address): + return self.ram[address] - def ram_write(self, pc, val): - self.ram[pc] = val + def ram_write(self, address, val): + self.ram[address] = val def load(self): """Load a program into memory.""" @@ -76,27 +82,49 @@ def trace(self): def run(self): """Run the CPU.""" - while self.running == True: + while self.halted == False: instruction = self.ram_read(self.pc) #print('instruction', "{0:b}".format(instruction)) - if instruction == self.PRN: + """ if instruction == PRN: val_to_print = self.ram[self.pc + 1] print(self.reg[val_to_print]) self.pc += 2 print('prn ran') - elif instruction == self.LDI: + elif instruction == LDI: reg_to_store = self.ram[self.pc + 1] val_to_store = self.ram[self.pc + 2] self.reg[reg_to_store] = val_to_store self.pc += 3 print('ldi ran') - elif instruction == self.HLT: + elif instruction == HLT: print('hlt ran') - self.running = False + self.halted = True else: unknown_instruction = "{0:b}".format(instruction) print(f"Instruction Unknown {unknown_instruction}") - sys.exit(1) + sys.exit(1) """ + + # From class + instruction = self.ram_read(self.pc) + operand_a = self.ram_read(self.pc + 1) + operand_b = self.ram_read(self.pc + 2) + self.execute_instruction(instruction, operand_a, operand_b) + # From class + def execute_instruction(self, instruction, operand_a, operand_b): + if instruction == HLT: + print('hlt ran') + self.halted = True + + elif instruction == PRN: + print(self.reg[operand_a]) + self.pc += 2 + print('prn ran') + + elif instruction == LDI: + self.reg[operand_a] = operand_b + self.pc += 3 + print('ldi ran') + From 682cd8915fe2fba97016d5265ced069873cd0331 Mon Sep 17 00:00:00 2001 From: jarparrish Date: Fri, 4 Dec 2020 21:13:00 -0700 Subject: [PATCH 4/6] base functionality implemented --- ls8/cpu.py | 31 +++++++++++++++++++++++++++++-- ls8/examples/test.ls8 | 6 ++++++ ls8/ls8.py | 4 +++- 3 files changed, 38 insertions(+), 3 deletions(-) create mode 100644 ls8/examples/test.ls8 diff --git a/ls8/cpu.py b/ls8/cpu.py index 6e9544806..08774d4ae 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -5,6 +5,7 @@ HLT = 0b00000001 LDI = 0b10000010 PRN = 0b01000111 +MULT = 0b10100010 class CPU: """Main CPU class.""" @@ -29,9 +30,30 @@ def ram_read(self, address): def ram_write(self, address, val): self.ram[address] = val - def load(self): + def load(self, args): """Load a program into memory.""" + program_code = [] + + try: + with open(f"ls8/examples/{args}") as ls8_file: + for line in ls8_file: + line_split = line.split("#") + possible_binary_number = line_split[0] + try: + new_binary_number = int(possible_binary_number, 2) + program_code.append(new_binary_number) + except: + print(f"Unable to cast '{possible_binary_number}' to an integer") + continue + except FileNotFoundError: + print("File Not Found") + + print("program code!!!!!!!!!!!", program_code) + + + + address = 0 # For now, we've just hardcoded a program: @@ -46,7 +68,7 @@ def load(self): 0b00000001, # HLT ] - for instruction in program: + for instruction in program_code: self.ram[address] = instruction address += 1 @@ -127,4 +149,9 @@ def execute_instruction(self, instruction, operand_a, operand_b): self.reg[operand_a] = operand_b self.pc += 3 print('ldi ran') + + elif instruction == MULT: + self.reg[operand_a] = self.reg[operand_a] * self.reg[operand_b] + self.pc += 3 + print('mult ran') diff --git a/ls8/examples/test.ls8 b/ls8/examples/test.ls8 new file mode 100644 index 000000000..abac63979 --- /dev/null +++ b/ls8/examples/test.ls8 @@ -0,0 +1,6 @@ +10000010 # LDI R0,8 +00000000 +00001000 +01000111 # PRN R0 +00000000 +00000001 # HLT \ No newline at end of file diff --git a/ls8/ls8.py b/ls8/ls8.py index 74128d36b..8f9867769 100755 --- a/ls8/ls8.py +++ b/ls8/ls8.py @@ -5,7 +5,9 @@ import sys from cpu import * +console_args = sys.argv[1] + cpu = CPU() -cpu.load() +cpu.load(console_args) cpu.run() \ No newline at end of file From 86c827a2ae44ef0542ff9e729ce1003289a5a02a Mon Sep 17 00:00:00 2001 From: jarparrish Date: Fri, 4 Dec 2020 21:32:28 -0700 Subject: [PATCH 5/6] mult moved to alu --- ls8/cpu.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 08774d4ae..bec27e1d9 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -78,6 +78,10 @@ def alu(self, op, reg_a, reg_b): if op == "ADD": self.reg[reg_a] += self.reg[reg_b] + if op == MULT: + print('regs', reg_a, reg_b) + self.reg[reg_a] = self.reg[reg_a] * self.reg[reg_b] + #elif op == "SUB": etc else: raise Exception("Unsupported ALU operation") @@ -151,7 +155,9 @@ def execute_instruction(self, instruction, operand_a, operand_b): print('ldi ran') elif instruction == MULT: - self.reg[operand_a] = self.reg[operand_a] * self.reg[operand_b] + """ self.reg[operand_a] = self.reg[operand_a] * self.reg[operand_b] + + print('mult ran') """ + self.alu(instruction, operand_a, operand_b) self.pc += 3 print('mult ran') - From d1343edd6c74f50b50b626444f4f9b3c704aca84 Mon Sep 17 00:00:00 2001 From: jarparrish Date: Tue, 8 Dec 2020 21:15:23 -0700 Subject: [PATCH 6/6] mvp --- ls8/cpu.py | 52 +++++++++++++++++++++++++++++++++++++++++++++++++--- ls8/ls8.py | 12 ++++++++++-- 2 files changed, 59 insertions(+), 5 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index bec27e1d9..15b619696 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -6,6 +6,8 @@ LDI = 0b10000010 PRN = 0b01000111 MULT = 0b10100010 +PUSH = 0b01000101 +POP = 0b01000110 class CPU: """Main CPU class.""" @@ -20,6 +22,8 @@ def __init__(self): #self.reg = [0, 0, 0, 0, 0, 0, 0, 0xF4] self.reg = [0] * 8 self.reg[7] = 0xF4 + self.stack_pointer = 7 + self.memory = [] """ self.HLT = 0b00000001 self.LDI = 0b10000010 self.PRN = 0b01000111 """ @@ -32,7 +36,7 @@ def ram_write(self, address, val): def load(self, args): """Load a program into memory.""" - + # My implementation program_code = [] try: @@ -50,7 +54,28 @@ def load(self, args): print("File Not Found") print("program code!!!!!!!!!!!", program_code) + stack_space = 256 - len(program_code) + memory = program_code + [0] * stack_space + self.reg[self.stack_pointer] = len(memory) - 1 + print('memory', memory) + ######################################################################################### + ############################################################################### From Class + """ address = 0 + + with open(args) as my_file: + for line in my_file: + comment_split = line.split("#") + maybe_binary_number = comment_split[0] + try: + x = int(maybe_binary_number, 2) + self.ram_write(x, address) + address += 1 + except: + continue """ + + + ########################################################################################## @@ -68,9 +93,10 @@ def load(self, args): 0b00000001, # HLT ] - for instruction in program_code: + for instruction in memory: self.ram[address] = instruction address += 1 + print(self.ram, 'ram') def alu(self, op, reg_a, reg_b): @@ -152,7 +178,7 @@ def execute_instruction(self, instruction, operand_a, operand_b): elif instruction == LDI: self.reg[operand_a] = operand_b self.pc += 3 - print('ldi ran') + print(f'ldi ran --{operand_b} store in reg{operand_a}') elif instruction == MULT: """ self.reg[operand_a] = self.reg[operand_a] * self.reg[operand_b] @@ -161,3 +187,23 @@ def execute_instruction(self, instruction, operand_a, operand_b): self.alu(instruction, operand_a, operand_b) self.pc += 3 print('mult ran') + elif instruction == PUSH: + self.reg[self.stack_pointer] -= 1 + reg_to_retrieve_val = operand_a + val_in_reg = self.reg[reg_to_retrieve_val] + self.ram[self.reg[self.stack_pointer]] = val_in_reg + self.pc += 2 + + print('push --- val in ram', self.ram[self.reg[self.stack_pointer]] ) + elif instruction == POP: + reg_to_pop = operand_a + + self.reg[reg_to_pop] = self.ram[self.reg[self.stack_pointer]] + print(f'pop ran --{self.ram[self.reg[self.stack_pointer]]}in reg{reg_to_pop}') + self.reg[self.stack_pointer] += 1 + self.pc += 2 + + ##### MULT FROM CLASS + """ elif instruction == MULT: + self.reg[operand_a] *= self.reg[operand_b] + self.pc += 3 """ \ No newline at end of file diff --git a/ls8/ls8.py b/ls8/ls8.py index 8f9867769..da1caf409 100755 --- a/ls8/ls8.py +++ b/ls8/ls8.py @@ -5,9 +5,17 @@ import sys from cpu import * -console_args = sys.argv[1] +# From class +""" if(len(sys.argv) != 2): + print('Please pass two arguments') +else: + console_args = sys.argv[1] + cpu = CPU() + cpu.load(console_args) + cpu.run() """ +############## +console_args = sys.argv[1] cpu = CPU() - cpu.load(console_args) cpu.run() \ No newline at end of file