From 5f87185913421863c6aa5820046a25d8f94dfa1c Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Thu, 3 Dec 2020 18:19:39 -0800 Subject: [PATCH 01/12] push for retro --- ls8/cpu.py | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 9a307496e..0cced5a80 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -7,7 +7,15 @@ class CPU: def __init__(self): """Construct a new CPU.""" - pass + self.R0 = 0 + self.R1 = 0 + self.R2 = 0 + self.R3 = 0 + self.R4 = 0 + self.R5 = 0 + self.R6 = 0 + self.R7 = '0xF4' + self.RAM = 0 def load(self): """Load a program into memory.""" From 84d3166742fc04fb7f00e474e533dcaeeaa0f890 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 5 Dec 2020 10:06:04 -0800 Subject: [PATCH 02/12] Codde for day one done. --- ls8/cpu.py | 44 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 10 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 0cced5a80..6818451e0 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -2,20 +2,20 @@ import sys +HLT = 0b00000001 +LDI = 0b10000010 +PRN = 0b01000111 + class CPU: """Main CPU class.""" def __init__(self): """Construct a new CPU.""" - self.R0 = 0 - self.R1 = 0 - self.R2 = 0 - self.R3 = 0 - self.R4 = 0 - self.R5 = 0 - self.R6 = 0 - self.R7 = '0xF4' - self.RAM = 0 + self.registers = [0] * 8 + self.registers[7] = 0xF4 + self.pc = 0 + self.ram = [0] * 256 + self.halted = False def load(self): """Load a program into memory.""" @@ -68,6 +68,30 @@ def trace(self): print() + def ram_read(self, address): + return self.ram[address] + + def ram_write(self, value, address): + self.ram[address] = value + def run(self): """Run the CPU.""" - pass + while not self.halted: + instruction_to_execute = self.ram_read(self.pc) + operand_a = self.ram_read(self.pc + 1) + operand_b = self.ram_read(self.pc + 2) + self.execute_instruction(instruction_to_execute, operand_a, operand_b) + + def execute_instruction(self, instruction, operand_a, operand_b): + if instruction == HLT: + self.halted = True + self.pc += 1 + elif instruction == PRN: + print(self.registers[operand_a]) + self.pc += 2 + elif instruction == LDI: + self.registers[operand_a] = operand_b + self.pc += 3 + else: + print('idk what to do.') + pass \ No newline at end of file From 2af7ca41a8cd67257ad0fcaacb7d56fd14ccedcb Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 5 Dec 2020 11:40:26 -0800 Subject: [PATCH 03/12] Pushing for retro. --- README.md | 2 +- ls8/cpu.py | 45 ++++++++++++++++++++++++++++----------------- 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/README.md b/README.md index 20c417457..295dfd5f4 100644 --- a/README.md +++ b/README.md @@ -36,4 +36,4 @@ - [ ] Add the timer interrupt to the LS-8 emulator - [ ] Add the keyboard interrupt to the LS-8 emulator -- [ ] Write an LS-8 assembly program to draw a curved histogram on the screen +- [ ] Write an LS-8 assembly program to draw a curved histogram on the screen \ No newline at end of file diff --git a/ls8/cpu.py b/ls8/cpu.py index 6818451e0..71e48dd10 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -22,21 +22,31 @@ def load(self): address = 0 + load_path = 'C:/Users/vrram/flexed/CS/Architecture/Computer-Architecture/ls8/examples.mult.ls8' + + try: + with open(load_path, 'r') as load_file: + for line in load_file: + print(line) + except FileNotFoundError: + print("file not found...") + + # For now, we've just hardcoded a program: - program = [ - # From print8.ls8 - 0b10000010, # LDI R0,8 - 0b00000000, - 0b00001000, - 0b01000111, # PRN R0 - 0b00000000, - 0b00000001, # HLT - ] + # program = [ + # # From print8.ls8 + # 0b10000010, # LDI R0,8 + # 0b00000000, + # 0b00001000, + # 0b01000111, # PRN R0 + # 0b00000000, + # 0b00000001, # HLT + # ] - for instruction in program: - self.ram[address] = instruction - address += 1 + # for instruction in program: + # self.ram[address] = instruction + # address += 1 def alu(self, op, reg_a, reg_b): @@ -76,11 +86,12 @@ def ram_write(self, value, address): def run(self): """Run the CPU.""" - while not self.halted: - instruction_to_execute = self.ram_read(self.pc) - operand_a = self.ram_read(self.pc + 1) - operand_b = self.ram_read(self.pc + 2) - self.execute_instruction(instruction_to_execute, operand_a, operand_b) + pass + # while not self.halted: + # instruction_to_execute = self.ram_read(self.pc) + # operand_a = self.ram_read(self.pc + 1) + # operand_b = self.ram_read(self.pc + 2) + # self.execute_instruction(instruction_to_execute, operand_a, operand_b) def execute_instruction(self, instruction, operand_a, operand_b): if instruction == HLT: From dc673803f58287d8aca2f089217897f74e30891b Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Tue, 8 Dec 2020 09:03:34 -0800 Subject: [PATCH 04/12] Added code from slack. Need to run it. Will implament Mari's soon. --- ls8/cpu.py | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 71e48dd10..b7175e4e9 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -17,20 +17,22 @@ def __init__(self): self.ram = [0] * 256 self.halted = False - def load(self): + def load(self, run_file): """Load a program into memory.""" - address = 0 - - load_path = 'C:/Users/vrram/flexed/CS/Architecture/Computer-Architecture/ls8/examples.mult.ls8' - try: - with open(load_path, 'r') as load_file: - for line in load_file: - print(line) - except FileNotFoundError: - print("file not found...") + address = 0 + with open(run_file) as file: + for line in file: + split_line = line.split("#")[0] + # remove white spaces + command = split_line.strip() + # skip empty lines + if command == "": + continue + + print(instuction) # For now, we've just hardcoded a program: @@ -105,4 +107,16 @@ def execute_instruction(self, instruction, operand_a, operand_b): self.pc += 3 else: print('idk what to do.') - pass \ No newline at end of file + pass + + if len(sys.argv) < 2: + print("Please pass in a second filename: python3 in_out.py second_filename.py") + sys.exit() + + file_name = sys.argv[1] + # load_memory(file_name) + + cpu = CPU() + + cpu.load(file_name) + cpu.run() \ No newline at end of file From 433412a7074182cf9eb0e44f028ac342031ab8a8 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Tue, 8 Dec 2020 18:31:10 -0800 Subject: [PATCH 05/12] code from mari entered in --- ls8/cpu.py | 68 +++++++++++++++++------------------------------------- ls8/ls8.py | 10 ++++---- 2 files changed, 27 insertions(+), 51 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index b7175e4e9..a5f1f2a9f 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -5,7 +5,7 @@ HLT = 0b00000001 LDI = 0b10000010 PRN = 0b01000111 - +MUL = 0b10100010 class CPU: """Main CPU class.""" @@ -17,46 +17,30 @@ def __init__(self): self.ram = [0] * 256 self.halted = False - def load(self, run_file): + def load(self, filename): """Load a program into memory.""" - try: - address = 0 - with open(run_file) as file: - for line in file: - split_line = line.split("#")[0] - # remove white spaces - command = split_line.strip() - - # skip empty lines - if command == "": - continue - - print(instuction) - - # For now, we've just hardcoded a program: - - # program = [ - # # From print8.ls8 - # 0b10000010, # LDI R0,8 - # 0b00000000, - # 0b00001000, - # 0b01000111, # PRN R0 - # 0b00000000, - # 0b00000001, # HLT - # ] - - # for instruction in program: - # self.ram[address] = instruction - # address += 1 - + address = 0 + # open the file + with open(filename) as my_file: + # go through each line to parse and get instruction + for line in my_file: + # try and get the instruction/operand in the line + comment_split = line.split("#") + maybe_binary_number = comment_split[0] + try: + x = int(maybe_binary_number, 2) + self.ram_write(x, address) + address += 1 + except: + continue def alu(self, op, reg_a, reg_b): """ALU operations.""" - if op == "ADD": - self.reg[reg_a] += self.reg[reg_b] - #elif op == "SUB": etc + if op === MUL: + self.registers[reg_a] *= self.registers[reg_b] + self.pd += 3 else: raise Exception("Unsupported ALU operation") @@ -105,18 +89,8 @@ def execute_instruction(self, instruction, operand_a, operand_b): elif instruction == LDI: self.registers[operand_a] = operand_b self.pc += 3 + elif instruction == MUL: + self.alu(instruction, operand_a, operand_b) else: print('idk what to do.') pass - - if len(sys.argv) < 2: - print("Please pass in a second filename: python3 in_out.py second_filename.py") - sys.exit() - - file_name = sys.argv[1] - # load_memory(file_name) - - cpu = CPU() - - cpu.load(file_name) - cpu.run() \ No newline at end of file diff --git a/ls8/ls8.py b/ls8/ls8.py index 74128d36b..119fcfc42 100755 --- a/ls8/ls8.py +++ b/ls8/ls8.py @@ -5,7 +5,9 @@ import sys from cpu import * -cpu = CPU() - -cpu.load() -cpu.run() \ No newline at end of file +if len(sys.argv) != 2: + print("wrong number of arguments passed in") +else: + cpu = CPU() + cpu.load(sys.argv[1]) + cpu.run() \ No newline at end of file From 7808326bdc73563a4d6779220279623386db29a9 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Tue, 8 Dec 2020 20:26:49 -0800 Subject: [PATCH 06/12] Still working on implimating POP and PUSH. --- ls8/cpu.py | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index a5f1f2a9f..728541f9b 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -6,6 +6,9 @@ LDI = 0b10000010 PRN = 0b01000111 MUL = 0b10100010 +PUSH = 0b01000101 +POP = 0b01000110 + class CPU: """Main CPU class.""" @@ -16,6 +19,7 @@ def __init__(self): self.pc = 0 self.ram = [0] * 256 self.halted = False + self.sp = F4 def load(self, filename): """Load a program into memory.""" @@ -72,12 +76,11 @@ def ram_write(self, value, address): def run(self): """Run the CPU.""" - pass - # while not self.halted: - # instruction_to_execute = self.ram_read(self.pc) - # operand_a = self.ram_read(self.pc + 1) - # operand_b = self.ram_read(self.pc + 2) - # self.execute_instruction(instruction_to_execute, operand_a, operand_b) + while not self.halted: + instruction_to_execute = self.ram_read(self.pc) + operand_a = self.ram_read(self.pc + 1) + operand_b = self.ram_read(self.pc + 2) + self.execute_instruction(instruction_to_execute, operand_a, operand_b) def execute_instruction(self, instruction, operand_a, operand_b): if instruction == HLT: @@ -91,6 +94,8 @@ def execute_instruction(self, instruction, operand_a, operand_b): self.pc += 3 elif instruction == MUL: self.alu(instruction, operand_a, operand_b) + elif instruction == PUSH: + self.registers[] else: print('idk what to do.') pass From 3d5f8b9f131ef9c90b6237ba355d330a2d8b2a66 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Thu, 10 Dec 2020 16:26:16 -0800 Subject: [PATCH 07/12] added PUSH and POP to the code. --- ls8/cpu.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 728541f9b..e75501133 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -9,6 +9,8 @@ PUSH = 0b01000101 POP = 0b01000110 +SP = 7 + class CPU: """Main CPU class.""" @@ -19,7 +21,6 @@ def __init__(self): self.pc = 0 self.ram = [0] * 256 self.halted = False - self.sp = F4 def load(self, filename): """Load a program into memory.""" @@ -76,6 +77,7 @@ def ram_write(self, value, address): def run(self): """Run the CPU.""" + while not self.halted: instruction_to_execute = self.ram_read(self.pc) operand_a = self.ram_read(self.pc + 1) @@ -95,7 +97,14 @@ def execute_instruction(self, instruction, operand_a, operand_b): elif instruction == MUL: self.alu(instruction, operand_a, operand_b) elif instruction == PUSH: - self.registers[] + # decrement the stack pointer + self.registers[SP] -= 1 + # store the operand ine the stack + self.ram_write(self.registers[operand_a], self.registers[SP]) + self.pc += 2 + elif instruction == POP: + self.registers[operand_a] = self.ram_read(self.registers[SP]) + self.pc += 2 else: print('idk what to do.') pass From 342b770edb836508885237ea9a5fbae4e6bee9dd Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Thu, 10 Dec 2020 20:31:31 -0800 Subject: [PATCH 08/12] working on CALL and RET --- ls8/cpu.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/ls8/cpu.py b/ls8/cpu.py index e75501133..fadab8279 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -8,6 +8,7 @@ MUL = 0b10100010 PUSH = 0b01000101 POP = 0b01000110 +CALL = 0b01010000 SP = 7 @@ -105,6 +106,11 @@ def execute_instruction(self, instruction, operand_a, operand_b): elif instruction == POP: self.registers[operand_a] = self.ram_read(self.registers[SP]) self.pc += 2 + elif instruction == CALL: + self.registers[SP] -= 1 + address_of_next_instruction = self.pc + 2 + elif instruction == RET: + pass else: print('idk what to do.') pass From fecda49a8ab44ec2202600f552ac2934f6d66731 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 12 Dec 2020 10:54:00 -0800 Subject: [PATCH 09/12] Pushing for retro --- ls8/cpu.py | 17 +++++++++++++---- ls8/ls8.py | 2 +- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index fadab8279..415683a08 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -9,6 +9,8 @@ PUSH = 0b01000101 POP = 0b01000110 CALL = 0b01010000 +RET = 0b00010001 +CMP = 0b10100111 SP = 7 @@ -22,6 +24,7 @@ def __init__(self): self.pc = 0 self.ram = [0] * 256 self.halted = False + self.fl = 0 def load(self, filename): """Load a program into memory.""" @@ -44,11 +47,14 @@ def load(self, filename): def alu(self, op, reg_a, reg_b): """ALU operations.""" - if op === MUL: + if op == MUL: self.registers[reg_a] *= self.registers[reg_b] self.pd += 3 else: raise Exception("Unsupported ALU operation") + if op == CMP: + if self.registers[reg_a] == self.registers[reg_b]: + self.fl = "E" def trace(self): """ @@ -58,7 +64,7 @@ def trace(self): print(f"TRACE: %02X | %02X %02X %02X |" % ( self.pc, - #self.fl, + self.fl, #self.ie, self.ram_read(self.pc), self.ram_read(self.pc + 1), @@ -107,10 +113,13 @@ def execute_instruction(self, instruction, operand_a, operand_b): self.registers[operand_a] = self.ram_read(self.registers[SP]) self.pc += 2 elif instruction == CALL: - self.registers[SP] -= 1 - address_of_next_instruction = self.pc + 2 + # self.registers[SP] -= 1 + # address_of_next_instruction = self.pc + 2 + pass elif instruction == RET: pass + elif instruction == CMP: + self.alu(instruction, operand_a, operand_b) else: print('idk what to do.') pass diff --git a/ls8/ls8.py b/ls8/ls8.py index 119fcfc42..4eea9ab5f 100755 --- a/ls8/ls8.py +++ b/ls8/ls8.py @@ -9,5 +9,5 @@ print("wrong number of arguments passed in") else: cpu = CPU() - cpu.load(sys.argv[1]) + cpu.load(sys.argv[0]) cpu.run() \ No newline at end of file From 863eb659e022530d453ae9773b4e342af54f089b Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 12 Dec 2020 10:54:33 -0800 Subject: [PATCH 10/12] Now, pushing for retro --- ls8/cpu.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index 415683a08..c42989edc 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -54,7 +54,7 @@ def alu(self, op, reg_a, reg_b): raise Exception("Unsupported ALU operation") if op == CMP: if self.registers[reg_a] == self.registers[reg_b]: - self.fl = "E" + self.fl = "E". def trace(self): """ From 93d6457cbabc55c97a08c3f37ee60c133115de33 Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 12 Dec 2020 11:44:27 -0800 Subject: [PATCH 11/12] Created the CMP in ALU ops. --- ls8/cpu.py | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index c42989edc..e73622cae 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -11,6 +11,9 @@ CALL = 0b01010000 RET = 0b00010001 CMP = 0b10100111 +JMP = 0b01010100 +JEQ = 0b01010101 +JNE = 0b01010110 SP = 7 @@ -54,7 +57,13 @@ def alu(self, op, reg_a, reg_b): raise Exception("Unsupported ALU operation") if op == CMP: if self.registers[reg_a] == self.registers[reg_b]: - self.fl = "E". + self.fl = 1 + if self.registers[reg_a] < registers[reg_b]: + self.fl = 1 + if self.registers[reg_a] > registers[reg_b]: + self.fl = 1 + else: + self.fl = 0 def trace(self): """ @@ -118,8 +127,18 @@ def execute_instruction(self, instruction, operand_a, operand_b): pass elif instruction == RET: pass + + elif instruction == CMP: self.alu(instruction, operand_a, operand_b) + elif instruction == JMP: + self.pc = self.registers[operand_a] + elif instruction == JEQ: + pass + elif instruction == JNE: + pass + + else: print('idk what to do.') pass From f1bf11766e6eb17a76208ad45f02d809a19a1f2a Mon Sep 17 00:00:00 2001 From: Veto Ramirez Date: Sat, 12 Dec 2020 11:50:29 -0800 Subject: [PATCH 12/12] Finshed the JMP, JEQ, and JNE instructions. Need to run test. Will probably be bugs, no doubt. Need to finish CALL and RET --- ls8/cpu.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/ls8/cpu.py b/ls8/cpu.py index e73622cae..d5aa40a48 100644 --- a/ls8/cpu.py +++ b/ls8/cpu.py @@ -134,9 +134,11 @@ def execute_instruction(self, instruction, operand_a, operand_b): elif instruction == JMP: self.pc = self.registers[operand_a] elif instruction == JEQ: - pass + if self.fl = 1: + self.pc = self.registers[operand_a] elif instruction == JNE: - pass + if self.fl = 0: + self.pc = self.registers[operand_a] else: