@@ -490,60 +490,60 @@ typedef struct
490490 */
491491
492492/** @brief Reset ADC handle state
493- * @param __HANDLE__: ADC handle
493+ * @param __HANDLE__ ADC handle
494494 * @retval None
495495 */
496496#define __HAL_ADC_RESET_HANDLE_STATE (__HANDLE__ ) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
497497
498498/**
499499 * @brief Enable the ADC peripheral.
500- * @param __HANDLE__: ADC handle
500+ * @param __HANDLE__ ADC handle
501501 * @retval None
502502 */
503503#define __HAL_ADC_ENABLE (__HANDLE__ ) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
504504
505505/**
506506 * @brief Disable the ADC peripheral.
507- * @param __HANDLE__: ADC handle
507+ * @param __HANDLE__ ADC handle
508508 * @retval None
509509 */
510510#define __HAL_ADC_DISABLE (__HANDLE__ ) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
511511
512512/**
513513 * @brief Enable the ADC end of conversion interrupt.
514- * @param __HANDLE__: specifies the ADC Handle.
515- * @param __INTERRUPT__: ADC Interrupt.
514+ * @param __HANDLE__ specifies the ADC Handle.
515+ * @param __INTERRUPT__ ADC Interrupt.
516516 * @retval None
517517 */
518518#define __HAL_ADC_ENABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
519519
520520/**
521521 * @brief Disable the ADC end of conversion interrupt.
522- * @param __HANDLE__: specifies the ADC Handle.
523- * @param __INTERRUPT__: ADC interrupt.
522+ * @param __HANDLE__ specifies the ADC Handle.
523+ * @param __INTERRUPT__ ADC interrupt.
524524 * @retval None
525525 */
526526#define __HAL_ADC_DISABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
527527
528528/** @brief Check if the specified ADC interrupt source is enabled or disabled.
529- * @param __HANDLE__: specifies the ADC Handle.
530- * @param __INTERRUPT__: specifies the ADC interrupt source to check.
529+ * @param __HANDLE__ specifies the ADC Handle.
530+ * @param __INTERRUPT__ specifies the ADC interrupt source to check.
531531 * @retval The new state of __IT__ (TRUE or FALSE).
532532 */
533533#define __HAL_ADC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
534534
535535/**
536536 * @brief Clear the ADC's pending flags.
537- * @param __HANDLE__: specifies the ADC Handle.
538- * @param __FLAG__: ADC flag.
537+ * @param __HANDLE__ specifies the ADC Handle.
538+ * @param __FLAG__ ADC flag.
539539 * @retval None
540540 */
541541#define __HAL_ADC_CLEAR_FLAG (__HANDLE__ , __FLAG__ ) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
542542
543543/**
544544 * @brief Get the selected ADC's flag status.
545- * @param __HANDLE__: specifies the ADC Handle.
546- * @param __FLAG__: ADC flag.
545+ * @param __HANDLE__ specifies the ADC Handle.
546+ * @param __FLAG__ ADC flag.
547547 * @retval None
548548 */
549549#define __HAL_ADC_GET_FLAG (__HANDLE__ , __FLAG__ ) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -651,7 +651,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
651651
652652/**
653653 * @brief Verification of ADC state: enabled or disabled
654- * @param __HANDLE__: ADC handle
654+ * @param __HANDLE__ ADC handle
655655 * @retval SET (ADC enabled) or RESET (ADC disabled)
656656 */
657657#define ADC_IS_ENABLE (__HANDLE__ ) \
@@ -661,7 +661,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
661661/**
662662 * @brief Test if conversion trigger of regular group is software start
663663 * or external trigger.
664- * @param __HANDLE__: ADC handle
664+ * @param __HANDLE__ ADC handle
665665 * @retval SET (software start) or RESET (external trigger)
666666 */
667667#define ADC_IS_SOFTWARE_START_REGULAR (__HANDLE__ ) \
@@ -670,7 +670,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
670670/**
671671 * @brief Test if conversion trigger of injected group is software start
672672 * or external trigger.
673- * @param __HANDLE__: ADC handle
673+ * @param __HANDLE__ ADC handle
674674 * @retval SET (software start) or RESET (external trigger)
675675 */
676676#define ADC_IS_SOFTWARE_START_INJECTED (__HANDLE__ ) \
@@ -687,7 +687,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
687687
688688/**
689689 * @brief Clear ADC error code (set it to error code: "no error")
690- * @param __HANDLE__: ADC handle
690+ * @param __HANDLE__ ADC handle
691691 * @retval None
692692 */
693693#define ADC_CLEAR_ERRORCODE (__HANDLE__ ) \
@@ -795,89 +795,89 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
795795
796796/**
797797 * @brief Set ADC Regular channel sequence length.
798- * @param _NbrOfConversion_: Regular channel sequence length.
798+ * @param _NbrOfConversion_ Regular channel sequence length.
799799 * @retval None
800800 */
801801#define ADC_SQR1 (_NbrOfConversion_ ) (((_NbrOfConversion_) - (uint8_t)1) << 20)
802802
803803/**
804804 * @brief Set the ADC's sample time for channel numbers between 10 and 18.
805- * @param _SAMPLETIME_: Sample time parameter.
806- * @param _CHANNELNB_: Channel number.
805+ * @param _SAMPLETIME_ Sample time parameter.
806+ * @param _CHANNELNB_ Channel number.
807807 * @retval None
808808 */
809809#define ADC_SMPR1 (_SAMPLETIME_ , _CHANNELNB_ ) ((_SAMPLETIME_) << (3 * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10)))
810810
811811/**
812812 * @brief Set the ADC's sample time for channel numbers between 0 and 9.
813- * @param _SAMPLETIME_: Sample time parameter.
814- * @param _CHANNELNB_: Channel number.
813+ * @param _SAMPLETIME_ Sample time parameter.
814+ * @param _CHANNELNB_ Channel number.
815815 * @retval None
816816 */
817817#define ADC_SMPR2 (_SAMPLETIME_ , _CHANNELNB_ ) ((_SAMPLETIME_) << (3 * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
818818
819819/**
820820 * @brief Set the selected regular channel rank for rank between 1 and 6.
821- * @param _CHANNELNB_: Channel number.
822- * @param _RANKNB_: Rank number.
821+ * @param _CHANNELNB_ Channel number.
822+ * @param _RANKNB_ Rank number.
823823 * @retval None
824824 */
825825#define ADC_SQR3_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 1)))
826826
827827/**
828828 * @brief Set the selected regular channel rank for rank between 7 and 12.
829- * @param _CHANNELNB_: Channel number.
830- * @param _RANKNB_: Rank number.
829+ * @param _CHANNELNB_ Channel number.
830+ * @param _RANKNB_ Rank number.
831831 * @retval None
832832 */
833833#define ADC_SQR2_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 7)))
834834
835835/**
836836 * @brief Set the selected regular channel rank for rank between 13 and 16.
837- * @param _CHANNELNB_: Channel number.
838- * @param _RANKNB_: Rank number.
837+ * @param _CHANNELNB_ Channel number.
838+ * @param _RANKNB_ Rank number.
839839 * @retval None
840840 */
841841#define ADC_SQR1_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * ((_RANKNB_) - 13)))
842842
843843/**
844844 * @brief Enable ADC continuous conversion mode.
845- * @param _CONTINUOUS_MODE_: Continuous mode.
845+ * @param _CONTINUOUS_MODE_ Continuous mode.
846846 * @retval None
847847 */
848848#define ADC_CR2_CONTINUOUS (_CONTINUOUS_MODE_ ) ((_CONTINUOUS_MODE_) << 1)
849849
850850/**
851851 * @brief Configures the number of discontinuous conversions for the regular group channels.
852- * @param _NBR_DISCONTINUOUSCONV_: Number of discontinuous conversions.
852+ * @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
853853 * @retval None
854854 */
855855#define ADC_CR1_DISCONTINUOUS (_NBR_DISCONTINUOUSCONV_ ) (((_NBR_DISCONTINUOUSCONV_) - 1) << ADC_CR1_DISCNUM_Pos)
856856
857857/**
858858 * @brief Enable ADC scan mode.
859- * @param _SCANCONV_MODE_: Scan conversion mode.
859+ * @param _SCANCONV_MODE_ Scan conversion mode.
860860 * @retval None
861861 */
862862#define ADC_CR1_SCANCONV (_SCANCONV_MODE_ ) ((_SCANCONV_MODE_) << 8)
863863
864864/**
865865 * @brief Enable the ADC end of conversion selection.
866- * @param _EOCSelection_MODE_: End of conversion selection mode.
866+ * @param _EOCSelection_MODE_ End of conversion selection mode.
867867 * @retval None
868868 */
869869#define ADC_CR2_EOCSelection (_EOCSelection_MODE_ ) ((_EOCSelection_MODE_) << 10)
870870
871871/**
872872 * @brief Enable the ADC DMA continuous request.
873- * @param _DMAContReq_MODE_: DMA continuous request mode.
873+ * @param _DMAContReq_MODE_ DMA continuous request mode.
874874 * @retval None
875875 */
876876#define ADC_CR2_DMAContReq (_DMAContReq_MODE_ ) ((_DMAContReq_MODE_) << 9)
877877
878878/**
879879 * @brief Return resolution bits in CR1 register.
880- * @param __HANDLE__: ADC handle
880+ * @param __HANDLE__ ADC handle
881881 * @retval None
882882 */
883883#define ADC_GET_RESOLUTION (__HANDLE__ ) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)
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