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Updated STM32L4xx HAL Drivers to v1.8.2
Included in STM32CubeL4 FW V1.11.0 Signed-off-by: Frederic.Pillon <frederic.pillon@st.com>
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41 files changed

+5798
-2748
lines changed

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 41 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -431,12 +431,12 @@
431431
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
432432
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
433433

434-
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
434+
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4)
435435
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
436436
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
437437
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
438438
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
439-
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
439+
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */
440440

441441
#if defined(STM32L1)
442442
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -2119,6 +2119,21 @@
21192119
#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
21202120
#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
21212121
#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
2122+
2123+
#if defined(STM32WB)
2124+
#define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE
2125+
#define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE
2126+
#define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
2127+
#define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
2128+
#define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET
2129+
#define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET
2130+
#define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED
2131+
#define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED
2132+
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
2133+
#define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
2134+
#define QSPI_IRQHandler QUADSPI_IRQHandler
2135+
#endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
2136+
21222137
#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
21232138
#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
21242139
#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
@@ -2787,7 +2802,9 @@
27872802
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
27882803
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
27892804

2790-
#if defined(STM32WB) || defined(STM32G0)
2805+
#if defined(STM32L4)
2806+
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
2807+
#elif defined(STM32WB) || defined(STM32G0)
27912808
#else
27922809
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
27932810
#endif
@@ -3038,6 +3055,16 @@
30383055
#define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef
30393056
#endif
30403057

3058+
#if defined(STM32H7)
3059+
#define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
3060+
#define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
3061+
#define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
3062+
#define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
3063+
#define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback
3064+
#define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback
3065+
#define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback
3066+
#define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback
3067+
#endif
30413068
/**
30423069
* @}
30433070
*/
@@ -3252,6 +3279,17 @@
32523279
* @}
32533280
*/
32543281

3282+
/** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
3283+
* @{
3284+
*/
3285+
#if defined(STM32H7)
3286+
#define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow
3287+
#define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT
3288+
#define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA
3289+
#endif
3290+
/**
3291+
* @}
3292+
*/
32553293

32563294
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
32573295
* @{

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32l4xx_hal_can_legacy.h‎

Lines changed: 769 additions & 0 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_can.h‎

Lines changed: 373 additions & 357 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_comp.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -189,10 +189,10 @@ typedef struct
189189
/** @defgroup COMP_Hysteresis COMP hysteresis
190190
* @{
191191
*/
192-
#define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
193-
#define COMP_HYSTERESIS_LOW (COMP_CSR_HYST_0) /*!< Hysteresis level low */
194-
#define COMP_HYSTERESIS_MEDIUM (COMP_CSR_HYST_1) /*!< Hysteresis level medium */
195-
#define COMP_HYSTERESIS_HIGH (COMP_CSR_HYST) /*!< Hysteresis level high */
192+
#define COMP_HYSTERESIS_NONE (0x00000000U) /*!< No hysteresis */
193+
#define COMP_HYSTERESIS_LOW ( COMP_CSR_HYST_0) /*!< Hysteresis level low */
194+
#define COMP_HYSTERESIS_MEDIUM (COMP_CSR_HYST_1 ) /*!< Hysteresis level medium */
195+
#define COMP_HYSTERESIS_HIGH (COMP_CSR_HYST_1 | COMP_CSR_HYST_0) /*!< Hysteresis level high */
196196
/**
197197
* @}
198198
*/

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_conf_template.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,7 @@
5353
#define HAL_MODULE_ENABLED
5454
#define HAL_ADC_MODULE_ENABLED
5555
#define HAL_CAN_MODULE_ENABLED
56+
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
5657
#define HAL_COMP_MODULE_ENABLED
5758
#define HAL_CORTEX_MODULE_ENABLED
5859
#define HAL_CRC_MODULE_ENABLED
@@ -243,6 +244,10 @@
243244
#include "stm32l4xx_hal_can.h"
244245
#endif /* HAL_CAN_MODULE_ENABLED */
245246

247+
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
248+
#include "Legacy/stm32l4xx_hal_can_legacy.h"
249+
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
250+
246251
#ifdef HAL_COMP_MODULE_ENABLED
247252
#include "stm32l4xx_hal_comp.h"
248253
#endif /* HAL_COMP_MODULE_ENABLED */

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h‎

Lines changed: 2 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -287,40 +287,6 @@ void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
287287
void HAL_NVIC_SystemReset(void);
288288
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
289289

290-
#if (__MPU_PRESENT == 1)
291-
/**
292-
* @brief Disable the MPU.
293-
* @retval None
294-
*/
295-
__STATIC_INLINE void HAL_MPU_Disable(void)
296-
{
297-
/* Disable fault exceptions */
298-
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
299-
300-
/* Disable the MPU */
301-
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
302-
}
303-
304-
/**
305-
* @brief Enable the MPU.
306-
* @param MPU_Control: Specifies the control mode of the MPU during hard fault,
307-
* NMI, FAULTMASK and privileged accessto the default memory
308-
* This parameter can be one of the following values:
309-
* @arg MPU_HFNMI_PRIVDEF_NONE
310-
* @arg MPU_HARDFAULT_NMI
311-
* @arg MPU_PRIVILEGED_DEFAULT
312-
* @arg MPU_HFNMI_PRIVDEF
313-
* @retval None
314-
*/
315-
__STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control)
316-
{
317-
/* Enable the MPU */
318-
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
319-
320-
/* Enable fault exceptions */
321-
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
322-
}
323-
#endif /* __MPU_PRESENT */
324290
/**
325291
* @}
326292
*/
@@ -341,6 +307,8 @@ void HAL_SYSTICK_IRQHandler(void);
341307
void HAL_SYSTICK_Callback(void);
342308

343309
#if (__MPU_PRESENT == 1)
310+
void HAL_MPU_Enable(uint32_t MPU_Control);
311+
void HAL_MPU_Disable(void);
344312
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
345313
#endif /* __MPU_PRESENT */
346314
/**

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_crc.h‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -263,17 +263,19 @@ typedef struct
263263
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
264264

265265
/**
266-
* @brief Store a 8-bit data in the Independent Data(ID) register.
266+
* @brief Store data in the Independent Data (ID) register.
267267
* @param __HANDLE__: CRC handle
268-
* @param __VALUE__: 8-bit value to be stored in the ID register
268+
* @param __VALUE__: Value to be stored in the ID register
269+
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
269270
* @retval None
270271
*/
271-
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
272+
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (MODIFY_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__)))
272273

273274
/**
274-
* @brief Return the 8-bit data stored in the Independent Data(ID) register.
275+
* @brief Return the data stored in the Independent Data (ID) register.
275276
* @param __HANDLE__: CRC handle
276-
* @retval 8-bit value of the ID register
277+
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
278+
* @retval Value of the ID register
277279
*/
278280
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
279281
/**

‎system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_ospi.h‎

Lines changed: 2 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -603,18 +603,6 @@ typedef struct
603603
#define HAL_OSPIM_IOPORT_1_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x1)) /*!< Port 1 - IO[7:4] */
604604
#define HAL_OSPIM_IOPORT_2_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x2)) /*!< Port 2 - IO[3:0] */
605605
#define HAL_OSPIM_IOPORT_2_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x2)) /*!< Port 2 - IO[7:4] */
606-
#define HAL_OSPIM_IOPORT_3_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x3)) /*!< Port 3 - IO[3:0] */
607-
#define HAL_OSPIM_IOPORT_3_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x3)) /*!< Port 3 - IO[7:4] */
608-
#define HAL_OSPIM_IOPORT_4_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x4)) /*!< Port 4 - IO[3:0] */
609-
#define HAL_OSPIM_IOPORT_4_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x4)) /*!< Port 4 - IO[7:4] */
610-
#define HAL_OSPIM_IOPORT_5_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x5)) /*!< Port 5 - IO[3:0] */
611-
#define HAL_OSPIM_IOPORT_5_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x5)) /*!< Port 5 - IO[7:4] */
612-
#define HAL_OSPIM_IOPORT_6_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x6)) /*!< Port 6 - IO[3:0] */
613-
#define HAL_OSPIM_IOPORT_6_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x6)) /*!< Port 6 - IO[7:4] */
614-
#define HAL_OSPIM_IOPORT_7_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x7)) /*!< Port 7 - IO[3:0] */
615-
#define HAL_OSPIM_IOPORT_7_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x7)) /*!< Port 7 - IO[7:4] */
616-
#define HAL_OSPIM_IOPORT_8_LOW ((uint32_t)(OCTOSPIM_PCR_IOLEN | 0x8)) /*!< Port 8 - IO[3:0] */
617-
#define HAL_OSPIM_IOPORT_8_HIGH ((uint32_t)(OCTOSPIM_PCR_IOHEN | 0x8)) /*!< Port 8 - IO[7:4] */
618606
/**
619607
* @}
620608
*/
@@ -949,24 +937,12 @@ HAL_StatusTypeDef HAL_OSPIM_Config (OSPI_HandleTypeDef *hospi,
949937

950938
#define IS_OSPI_CS_BOUNDARY(BOUNDARY) ((BOUNDARY) <= 31)
951939

952-
#define IS_OSPIM_PORT(NUMBER) (((NUMBER) >= 1) && ((NUMBER) <= 8))
940+
#define IS_OSPIM_PORT(NUMBER) (((NUMBER) >= 1) && ((NUMBER) <= 2))
953941

954942
#define IS_OSPIM_IO_PORT(PORT) (((PORT) == HAL_OSPIM_IOPORT_1_LOW) || \
955943
((PORT) == HAL_OSPIM_IOPORT_1_HIGH) || \
956944
((PORT) == HAL_OSPIM_IOPORT_2_LOW) || \
957-
((PORT) == HAL_OSPIM_IOPORT_2_HIGH) || \
958-
((PORT) == HAL_OSPIM_IOPORT_3_LOW) || \
959-
((PORT) == HAL_OSPIM_IOPORT_3_HIGH) || \
960-
((PORT) == HAL_OSPIM_IOPORT_4_LOW) || \
961-
((PORT) == HAL_OSPIM_IOPORT_4_HIGH) || \
962-
((PORT) == HAL_OSPIM_IOPORT_5_LOW) || \
963-
((PORT) == HAL_OSPIM_IOPORT_5_HIGH) || \
964-
((PORT) == HAL_OSPIM_IOPORT_6_LOW) || \
965-
((PORT) == HAL_OSPIM_IOPORT_6_HIGH) || \
966-
((PORT) == HAL_OSPIM_IOPORT_7_LOW) || \
967-
((PORT) == HAL_OSPIM_IOPORT_7_HIGH) || \
968-
((PORT) == HAL_OSPIM_IOPORT_8_LOW) || \
969-
((PORT) == HAL_OSPIM_IOPORT_8_HIGH))
945+
((PORT) == HAL_OSPIM_IOPORT_2_HIGH))
970946
/**
971947
@endcond
972948
*/

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