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M2354: Support TF-M
1. Configure non-secure target name to NU_M2354 (targets/targets.json). No NU_M2354_NS alias 2. Following template target, enable image signing and concatenating in post-build process (1) Add post-build script (tools/targets). (2) Enable TF-M custom build by centralize relevant stuff imported from TF-M (COMPONENT_TFM_S_FW). 3. Add M2354Code.merge_secure into whitelist of uvision6 (tools/export/uvision/__init__.py). 4. Add M2354 CMSIS pack database (tools/arm_pack_manager/index.json). 5. Configure stdio baudrate to 115200 to match TF-M port (platform/mbed_lib.json). 6. Define CMSIS_NVIC_VIRTUAL to override NVIC_SystemReset with TF-M version (cmsis_nvic_virtual.h). 7. Override tfm_ns_interface_xxx(...) to enable NS secure call: (1) At pre-rtos stage (2) In SVC context 8. Implement secure function call with tfm_platform_ioctl(...). 9. Combine stddriver_secure.h/c and hal_secure.h/c into platform_extra_secure.h/c. 10. Fix peripheral base to non-secure (PeripheralNames.h) (TrustZone-unaware since Mbed OS 6.0). 11. Fix NU_PORT_BASE/NU_GET_GPIO_PIN_DATA/NU_SET_GPIO_PIN_DATA to non-secure (PinNamesCommon.h) (TrustZone-unaware since Mbed OS 6.0). 12. NSC convention for StdDriver sys/clk (both TF-M and Mbed must follow) (1) SYS_ResetModule Usage: Replaced with SYS_ResetModule_S on Mbed OS Action: Make it inaccessible from Mbed (neither source nor NSC). Provide SYS_ResetModule_S on Mbed via platform ioctl instead. (2) CLK_GetXxx Usage: Called in bpwm/i2s/qspi/sc/sdh and system_M2354 on Mbed OS Action: Make them inaccessible from Mbed (neither source nor NSC). Re-provide them on Mbed via platform ioctl instead. 13. Remove DISABLE/ENABLE macro definitions in BSP to avoid name conflict with other modules 14. Change to TMR4/5 from TMR2/3 for implementing us_ticker/lp_ticker because TMR2 is used for TF-M NSPE test 15. Support cmake NOTE: Export(uvision6) doesn't support TF-M target. To enable it for partial compile on Keil, force below function to return true. is_target_supported(tools/export/uvision/__init__.py)
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‎platform/mbed_lib.json‎

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@@ -208,6 +208,9 @@
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"NU_PFM_M2351": {
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"stdio-baud-rate": 115200
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},
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"NU_M2354": {
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"stdio-baud-rate": 115200
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},
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"NRF52840_DK": {
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"crash-capture-enabled": true,
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"fatal-error-auto-reboot-enabled": true

‎targets/TARGET_NUVOTON/CMakeLists.txt‎

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@@ -9,6 +9,7 @@ add_subdirectory(TARGET_M451 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_M480 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_NANO100 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_NUC472 EXCLUDE_FROM_ALL)
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add_subdirectory(TARGET_M2354 EXCLUDE_FROM_ALL)
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target_include_directories(mbed-nuvoton
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INTERFACE

‎targets/TARGET_NUVOTON/TARGET_M2354/CMakeLists.txt‎

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# Copyright (c) 2020-2021 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
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set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/M2354.ld)
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elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
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set(LINKER_FILE device/TOOLCHAIN_ARMC6/M2354.sct)
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endif()
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add_library(mbed-m2354 INTERFACE)
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target_sources(mbed-m2354
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INTERFACE
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analogin_api.c
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analogout_api.c
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device/startup_M2354.c
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device/system_M2354.c
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device/StdDriver/src/m2354_acmp.c
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device/StdDriver/src/m2354_bpwm.c
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device/StdDriver/src/m2354_can.c
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device/StdDriver/src/m2354_clk.c
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device/StdDriver/src/m2354_crc.c
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device/StdDriver/src/m2354_crypto.c
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device/StdDriver/src/m2354_dac.c
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device/StdDriver/src/m2354_dpm.c
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device/StdDriver/src/m2354_eadc.c
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device/StdDriver/src/m2354_ebi.c
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device/StdDriver/src/m2354_ecap.c
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device/StdDriver/src/m2354_epwm.c
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device/StdDriver/src/m2354_ewdt.c
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device/StdDriver/src/m2354_ewwdt.c
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device/StdDriver/src/m2354_fmc.c
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device/StdDriver/src/m2354_fvc.c
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device/StdDriver/src/m2354_gpio.c
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device/StdDriver/src/m2354_i2c.c
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device/StdDriver/src/m2354_i2s.c
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device/StdDriver/src/m2354_keystore.c
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device/StdDriver/src/m2354_lcd.c
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device/StdDriver/src/m2354_pdma.c
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device/StdDriver/src/m2354_qei.c
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device/StdDriver/src/m2354_qspi.c
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device/StdDriver/src/m2354_rng.c
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device/StdDriver/src/m2354_rtc.c
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device/StdDriver/src/m2354_sc.c
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device/StdDriver/src/m2354_scuart.c
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device/StdDriver/src/m2354_sdh.c
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device/StdDriver/src/m2354_spi.c
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device/StdDriver/src/m2354_sys.c
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device/StdDriver/src/m2354_tamper.c
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device/StdDriver/src/m2354_timer.c
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device/StdDriver/src/m2354_timer_pwm.c
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device/StdDriver/src/m2354_uart.c
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device/StdDriver/src/m2354_usbd.c
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device/StdDriver/src/m2354_usci_i2c.c
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device/StdDriver/src/m2354_usci_spi.c
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device/StdDriver/src/m2354_usci_uart.c
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device/StdDriver/src/m2354_wdt.c
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device/StdDriver/src/m2354_wwdt.c
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dma_api.c
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gpio_api.c
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gpio_irq_api.c
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i2c_api.c
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lp_ticker.c
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mbed_overrides.c
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PeripheralPins.c
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pinmap.c
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port_api.c
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pwmout_api.c
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rtc_api.c
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serial_api.c
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sleep.c
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spi_api.c
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trng_api.cpp
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us_ticker.c
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)
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target_include_directories(mbed-m2354
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INTERFACE
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.
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device
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device/Reg
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device/StdDriver/inc
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)
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target_link_libraries(mbed-m2354 INTERFACE mbed-nuvoton)
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mbed_set_linker_script(mbed-m2354 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
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add_library(mbed-nu-m2354 INTERFACE)
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if("TFM" IN_LIST MBED_TARGET_LABELS)
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add_subdirectory(TARGET_TFM)
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endif()
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target_include_directories(mbed-nu-m2354
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INTERFACE
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TARGET_NU_M2354
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)
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target_link_libraries(mbed-nu-m2354
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INTERFACE
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mbed-m2354
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mbed-m2354-tfm
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)

‎targets/TARGET_NUVOTON/TARGET_M2354/PeripheralNames.h‎

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/*
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* Copyright (c) 2020, Nuvoton Technology Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
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// which encodes module base address and module index/subindex.
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#define NU_MODSUBINDEX_Pos 0
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#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
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#define NU_MODINDEX_Pos 20
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#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)
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#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
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#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
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#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
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#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)
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#if 0
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typedef enum {
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GPIO_A = (int) NU_MODNAME(GPIOA_BASE + NS_OFFSET, 0, 0),
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GPIO_B = (int) NU_MODNAME(GPIOB_BASE + NS_OFFSET, 1, 0),
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GPIO_C = (int) NU_MODNAME(GPIOC_BASE + NS_OFFSET, 2, 0),
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GPIO_D = (int) NU_MODNAME(GPIOD_BASE + NS_OFFSET, 3, 0),
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GPIO_E = (int) NU_MODNAME(GPIOE_BASE + NS_OFFSET, 4, 0),
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GPIO_F = (int) NU_MODNAME(GPIOF_BASE + NS_OFFSET, 5, 0),
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GPIO_G = (int) NU_MODNAME(GPIOG_BASE + NS_OFFSET, 6, 0),
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GPIO_H = (int) NU_MODNAME(GPIOH_BASE + NS_OFFSET, 7, 0),
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} GPIOName;
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#endif
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typedef enum {
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ADC_0_0 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 0),
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ADC_0_1 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 1),
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ADC_0_2 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 2),
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ADC_0_3 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 3),
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ADC_0_4 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 4),
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ADC_0_5 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 5),
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ADC_0_6 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 6),
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ADC_0_7 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 7),
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ADC_0_8 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 8),
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ADC_0_9 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 9),
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ADC_0_10 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 10),
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ADC_0_11 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 11),
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ADC_0_12 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 12),
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ADC_0_13 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 13),
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ADC_0_14 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 14),
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ADC_0_15 = (int) NU_MODNAME(EADC_BASE + NS_OFFSET, 0, 15),
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} ADCName;
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typedef enum {
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DAC_0_0 = (int) NU_MODNAME(DAC0_BASE + NS_OFFSET, 0, 0),
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DAC_1_0 = (int) NU_MODNAME(DAC1_BASE + NS_OFFSET, 1, 0),
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} DACName;
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typedef enum {
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UART_0 = (int) NU_MODNAME(UART0_BASE + NS_OFFSET, 0, 0),
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UART_1 = (int) NU_MODNAME(UART1_BASE + NS_OFFSET, 1, 0),
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UART_2 = (int) NU_MODNAME(UART2_BASE + NS_OFFSET, 2, 0),
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UART_3 = (int) NU_MODNAME(UART3_BASE + NS_OFFSET, 3, 0),
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UART_4 = (int) NU_MODNAME(UART4_BASE + NS_OFFSET, 4, 0),
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UART_5 = (int) NU_MODNAME(UART5_BASE + NS_OFFSET, 5, 0),
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// NOTE: board-specific
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#if defined(MBED_CONF_TARGET_USB_UART)
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USB_UART = MBED_CONF_TARGET_USB_UART,
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#else
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USB_UART = NC,
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#endif
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#if defined(MBED_CONF_TARGET_STDIO_UART)
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STDIO_UART = MBED_CONF_TARGET_STDIO_UART,
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#else
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STDIO_UART = USB_UART,
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#endif
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} UARTName;
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typedef enum {
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SPI_0 = (int) NU_MODNAME(SPI0_BASE + NS_OFFSET, 0, 0),
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SPI_1 = (int) NU_MODNAME(SPI1_BASE + NS_OFFSET, 1, 0),
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SPI_2 = (int) NU_MODNAME(SPI2_BASE + NS_OFFSET, 2, 0),
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SPI_3 = (int) NU_MODNAME(SPI3_BASE + NS_OFFSET, 3, 0),
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/* No SPI4 H/W, degrade QSPI0 H/W to SPI_4 for standard SPI usage */
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SPI_4 = (int) NU_MODNAME(QSPI0_BASE + NS_OFFSET, 4, 0),
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} SPIName;
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typedef enum {
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I2C_0 = (int) NU_MODNAME(I2C0_BASE + NS_OFFSET, 0, 0),
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I2C_1 = (int) NU_MODNAME(I2C1_BASE + NS_OFFSET, 1, 0),
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I2C_2 = (int) NU_MODNAME(I2C2_BASE + NS_OFFSET, 2, 0),
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} I2CName;
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typedef enum {
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PWM_0_0 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 0),
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PWM_0_1 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 1),
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PWM_0_2 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 2),
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PWM_0_3 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 3),
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PWM_0_4 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 4),
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PWM_0_5 = (int) NU_MODNAME(EPWM0_BASE + NS_OFFSET, 0, 5),
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PWM_1_0 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 0),
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PWM_1_1 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 1),
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PWM_1_2 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 2),
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PWM_1_3 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 3),
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PWM_1_4 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 4),
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PWM_1_5 = (int) NU_MODNAME(EPWM1_BASE + NS_OFFSET, 1, 5),
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} PWMName;
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typedef enum {
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TIMER_2 = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET, 2, 0),
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TIMER_3 = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET + 0x100, 3, 0),
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TIMER_4 = (int) NU_MODNAME(TMR45_BASE + NS_OFFSET, 4, 0),
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TIMER_5 = (int) NU_MODNAME(TMR45_BASE + NS_OFFSET + 0x100, 5, 0),
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} TIMERName;
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typedef enum {
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DMA_1 = (int) NU_MODNAME(PDMA1_BASE + NS_OFFSET, 1, 0),
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} DMAName;
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typedef enum {
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SD_0 = (int) NU_MODNAME(SDH0_BASE + NS_OFFSET, 0, 0),
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} SDName;
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typedef enum {
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CAN_0 = (int) NU_MODNAME(CAN0_BASE + NS_OFFSET, 0, 0),
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} CANName;
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#ifdef __cplusplus
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}
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#endif
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#endif

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