STM32L1 astyle

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xB/cmsis_nvic.h

@@ -31,8 +31,8 @@
 
 #if !defined(MBED_RAM_SIZE)
 #define MBED_RAM_SIZE  0x8000  // 32 KB
- //   0x4000 // 16 KB STM32L151CB STM32L151RB STM32L151VB
- //   0x8000 // 32 KB STM32L151CBxxA STM32L151RBxxA STM32L151VBxxA
+//   0x4000 // 16 KB STM32L151CB STM32L151RB STM32L151VB
+//   0x8000 // 32 KB STM32L151CBxxA STM32L151RBxxA STM32L151VBxxA
 #warning "check MBED_RAM_SIZE value in cmsis_nvic.h"
 #endif
 

targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xC/TARGET_XDOT_L151CC/system_clock.c

@@ -63,7 +63,7 @@ uint8_t SetSysClock_PLL_HSI(void);
   * @param  None
   * @retval None
   */
-void SystemInit (void)
+void SystemInit(void)
 {
     /*!< Set MSION bit */
     RCC->CR |= (uint32_t)0x00000100;
@@ -131,7 +131,7 @@ void SetSysClock(void)
         {
             /* 3- If fail start with HSI clock */
             if (SetSysClock_PLL_HSI() == 0) {
-                while(1) {
+                while (1) {
                     // [TODO] Put something here to tell the user that a problem occured...
                 }
             }

targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L152xB/cmsis_nvic.h

@@ -31,8 +31,8 @@
 
 #if !defined(MBED_RAM_SIZE)
 #define MBED_RAM_SIZE  0x8000  // 32 KB
- //   0x4000 // 16 KB STM32L152CB STM32L152RB STM32L152VB
- //   0x8000 // 32 KB STM32L152CBxxA STM32L152RBxxA STM32L152VBxxA
+//   0x4000 // 16 KB STM32L152CB STM32L152RB STM32L152VB
+//   0x8000 // 32 KB STM32L152CBxxA STM32L152RBxxA STM32L152VBxxA
 #warning "check MBED_RAM_SIZE value in cmsis_nvic.h"
 #endif
 

targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L152xC/TARGET_MOTE_L152RC/system_clock.c

@@ -63,7 +63,7 @@ uint8_t SetSysClock_PLL_HSI(void);
   * @param  None
   * @retval None
   */
-void SystemInit (void)
+void SystemInit(void)
 {
     /*!< Set MSION bit */
     RCC->CR |= (uint32_t)0x00000100;
@@ -117,7 +117,7 @@ void SetSysClock(void)
         {
             /* 3- If fail start with HSI clock */
             if (SetSysClock_PLL_HSI() == 0) {
-                while(1) {
+                while (1) {
                     // [TODO] Put something here to tell the user that a problem occured...
                 }
             }
@@ -137,8 +137,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
     RCC_ClkInitTypeDef RCC_ClkInitStruct;
     RCC_OscInitTypeDef RCC_OscInitStruct;
 
-    if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL)
-        return 1;   // already on HSE PLL, could occur from deepsleep waking
+    if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) {
+        return 1;    // already on HSE PLL, could occur from deepsleep waking
+    }
 
     /* Used to gain time after DeepSleep in case HSI is used */
     if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {

targets/TARGET_STM/TARGET_STM32L1/us_ticker_data.h

@@ -17,13 +17,13 @@
 #define __US_TICKER_DATA_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 #include "stm32l1xx.h"
 #include "stm32l1xx_ll_tim.h"
 #include "cmsis_nvic.h"
-   
+
 #define TIM_MST      TIM5
 #define TIM_MST_IRQ  TIM5_IRQn
 #define TIM_MST_RCC  __TIM5_CLK_ENABLE()