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To keep proprietary BSP DutyCycle definition and rename HighDutyCycle in extend API
1 parent 045f443 commit 5b693ff

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12 files changed

+41
-41
lines changed

12 files changed

+41
-41
lines changed

‎targets/TARGET_NUVOTON/TARGET_M251/device/StdDriver/inc/m251_pwm.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -475,7 +475,7 @@ uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u3
475475
uint32_t PWM_ConfigOutputChannel2(PWM_T *epwm,
476476
uint32_t u32ChannelNum,
477477
uint32_t u32Frequency,
478-
uint32_t u32DutyCycle,
478+
uint32_t u32HighDutyCycle,
479479
uint32_t u32Frequency2);
480480
void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask);
481481
void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask);

‎targets/TARGET_NUVOTON/TARGET_M251/device/StdDriver/src/m251_pwm.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -138,14 +138,14 @@ uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u
138138
* - PWM1 : PWM Group 1
139139
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
140140
* @param[in] u32Frequency Target generator frequency
141-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
141+
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
142142
* @return Nearest frequency clock in nano second
143143
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure PWM frequency may affect
144144
* existing frequency of other channel.
145145
*/
146146
uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
147147
{
148-
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
148+
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle*100, 1);
149149
}
150150

151151
/**
@@ -155,13 +155,13 @@ uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u3
155155
* - PWM1 : PWM Group 1
156156
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
157157
* @param[in] u32Frequency Target generator frequency = u32Frequency / u32Frequency2
158-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
158+
* @param[in] u32HighDutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
159159
* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
160160
* @return Nearest frequency clock in nano second
161161
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure PWM frequency may affect
162162
* existing frequency of other channel.
163163
*/
164-
uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle, uint32_t u32Frequency2)
164+
uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32HighDutyCycle, uint32_t u32Frequency2)
165165
{
166166
uint32_t u32Src;
167167
uint32_t u32PWMClockSrc;
@@ -219,12 +219,12 @@ uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u
219219
u16CNR -= 1UL;
220220
PWM_SET_CNR(pwm, u32ChannelNum, u16CNR);
221221

222-
if (u32DutyCycle)
222+
if (u32HighDutyCycle)
223223
{
224-
if (u32DutyCycle >= 10000UL)
224+
if (u32HighDutyCycle >= 10000UL)
225225
PWM_SET_CMR(pwm, u32ChannelNum, u16CNR);
226226
else
227-
PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1UL) / 10000UL);
227+
PWM_SET_CMR(pwm, u32ChannelNum, u32HighDutyCycle * (u16CNR + 1UL) / 10000UL);
228228

229229
(pwm)->WGCTL0 &= ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1UL));
230230
(pwm)->WGCTL0 |= (PWM_OUTPUT_LOW << ((u32ChannelNum << 1UL) + PWM_WGCTL0_PRDPCTL0_Pos));

‎targets/TARGET_NUVOTON/TARGET_M261/device/StdDriver/m261_epwm.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
117117
* - EPWM1 : EPWM Group 1
118118
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
119119
* @param[in] u32Frequency Target generator frequency
120-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
120+
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
121121
* @return Nearest frequency clock in nano second
122122
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
123123
* existing frequency of other channel.
@@ -126,7 +126,7 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
126126
*/
127127
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
128128
{
129-
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
129+
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle*100, 1);
130130
}
131131

132132
/**
@@ -136,15 +136,15 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
136136
* - EPWM1 : EPWM Group 1
137137
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
138138
* @param[in] u32Frequency Target generator frequency
139-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
139+
* @param[in] u32HighDutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
140140
* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
141141
* @return Nearest frequency clock in nano second
142142
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
143143
* existing frequency of other channel.
144144
* @note This function is used for initial stage.
145145
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
146146
*/
147-
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle, uint32_t u32Frequency2)
147+
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32HighDutyCycle, uint32_t u32Frequency2)
148148
{
149149
uint32_t u32PWMClockSrc;
150150
uint32_t i;
@@ -183,7 +183,7 @@ uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
183183

184184
u32CNR = u32CNR - 1U;
185185
EPWM_SET_CNR(epwm, u32ChannelNum, u32CNR);
186-
EPWM_SET_CMR(epwm, u32ChannelNum, u32DutyCycle * (u32CNR + 1UL) / 10000UL);
186+
EPWM_SET_CMR(epwm, u32ChannelNum, u32HighDutyCycle * (u32CNR + 1UL) / 10000UL);
187187

188188
(epwm)->WGCTL0 = ((epwm)->WGCTL0 & ~((EPWM_WGCTL0_PRDPCTL0_Msk | EPWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum << 1))) | \
189189
(EPWM_OUTPUT_HIGH << (u32ChannelNum << 1UL << EPWM_WGCTL0_ZPCTL0_Pos));

‎targets/TARGET_NUVOTON/TARGET_M261/device/StdDriver/m261_epwm.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -566,7 +566,7 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
566566
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm,
567567
uint32_t u32ChannelNum,
568568
uint32_t u32Frequency,
569-
uint32_t u32DutyCycle,
569+
uint32_t u32HighDutyCycle,
570570
uint32_t u32Frequency2);
571571
void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
572572
void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);

‎targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_pwm.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u
9797
* - PWM1 : PWM Group 1
9898
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
9999
* @param[in] u32Frequency Target generator frequency
100-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
100+
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
101101
* @return Nearest frequency clock in nano second
102102
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure PWM frequency may affect
103103
* existing frequency of other channel.
@@ -107,15 +107,15 @@ uint32_t PWM_ConfigOutputChannel (PWM_T *pwm,
107107
uint32_t u32Frequency,
108108
uint32_t u32DutyCycle)
109109
{
110-
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
110+
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle*100, 1);
111111
}
112112

113113
/**
114114
* @brief This function config PWM generator and get the nearest frequency in edge aligned auto-reload mode
115115
* @param[in] pwm The base address of PWM module
116116
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
117117
* @param[in] u32Frequency Target generator frequency = u32Frequency / u32Frequency2
118-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
118+
* @param[in] u32HighDutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
119119
* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
120120
* @return Nearest frequency clock in nano second
121121
* @note Since every two channels, (0 & 1), (2 & 3), (4 & 5), shares a prescaler. Call this API to configure PWM frequency may affect
@@ -124,7 +124,7 @@ uint32_t PWM_ConfigOutputChannel (PWM_T *pwm,
124124
uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm,
125125
uint32_t u32ChannelNum,
126126
uint32_t u32Frequency,
127-
uint32_t u32DutyCycle,
127+
uint32_t u32HighDutyCycle,
128128
uint32_t u32Frequency2)
129129
{
130130
uint32_t u32Src;
@@ -176,9 +176,9 @@ uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm,
176176
(pwm)->CTL1 &= ~(PWM_CTL1_CNTMODE0_Msk << u32ChannelNum);
177177

178178
PWM_SET_CNR(pwm, u32ChannelNum, --u16CNR);
179-
if(u32DutyCycle)
179+
if(u32HighDutyCycle)
180180
{
181-
PWM_SET_CMR(pwm, u32ChannelNum, u32DutyCycle * (u16CNR + 1) / 10000 - 1);
181+
PWM_SET_CMR(pwm, u32ChannelNum, u32HighDutyCycle * (u16CNR + 1) / 10000 - 1);
182182
(pwm)->WGCTL0 &= ~((PWM_WGCTL0_PRDPCTL0_Msk | PWM_WGCTL0_ZPCTL0_Msk) << (u32ChannelNum * 2));
183183
(pwm)->WGCTL0 |= (PWM_OUTPUT_LOW << (u32ChannelNum * 2 + PWM_WGCTL0_PRDPCTL0_Pos));
184184
(pwm)->WGCTL1 &= ~((PWM_WGCTL1_CMPDCTL0_Msk | PWM_WGCTL1_CMPUCTL0_Msk) << (u32ChannelNum * 2));

‎targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_pwm.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -476,7 +476,7 @@ uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u3
476476
uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm,
477477
uint32_t u32ChannelNum,
478478
uint32_t u32Frequency,
479-
uint32_t u32DutyCycle,
479+
uint32_t u32HighDutyCycle,
480480
uint32_t u32Frequency2);
481481
void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask);
482482
void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask);

‎targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/inc/m480_epwm.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -541,7 +541,7 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
541541
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm,
542542
uint32_t u32ChannelNum,
543543
uint32_t u32Frequency,
544-
uint32_t u32DutyCycle,
544+
uint32_t u32HighDutyCycle,
545545
uint32_t u32Frequency2);
546546
void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
547547
void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);

‎targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/src/m480_epwm.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,7 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
126126
* - EPWM1 : EPWM Group 1
127127
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
128128
* @param[in] u32Frequency Target generator frequency
129-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 20000 means 20%...
129+
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
130130
* @return Nearest frequency clock in nano second
131131
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
132132
* existing frequency of other channel.
@@ -135,7 +135,7 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
135135
*/
136136
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
137137
{
138-
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
138+
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle*100, 1);
139139
}
140140

141141
/**
@@ -145,15 +145,15 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
145145
* - EPWM1 : EPWM Group 1
146146
* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
147147
* @param[in] u32Frequency Target generator frequency / u32Frequency2
148-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
148+
* @param[in] u32HighDutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
149149
* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
150150
* @return Nearest frequency clock in nano second
151151
* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
152152
* existing frequency of other channel.
153153
* @note This function is used for initial stage.
154154
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
155155
*/
156-
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle, uint32_t u32Frequency2)
156+
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32HighDutyCycle, uint32_t u32Frequency2)
157157
{
158158
uint32_t u32Src;
159159
uint32_t u32EPWMClockSrc;
@@ -211,7 +211,7 @@ uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
211211

212212
u32CNR -= 1U;
213213
EPWM_SET_CNR(epwm, u32ChannelNum, u32CNR);
214-
EPWM_SET_CMR(epwm, u32ChannelNum, u32DutyCycle * (u32CNR + 1U) / 10000U);
214+
EPWM_SET_CMR(epwm, u32ChannelNum, u32HighDutyCycle * (u32CNR + 1U) / 10000U);
215215

216216
(epwm)->WGCTL0 = ((epwm)->WGCTL0 & ~(((1UL << EPWM_WGCTL0_PRDPCTL0_Pos) | (1UL << EPWM_WGCTL0_ZPCTL0_Pos)) << (u32ChannelNum << 1U))) | \
217217
((uint32_t)EPWM_OUTPUT_HIGH << ((u32ChannelNum << 1U) + (uint32_t)EPWM_WGCTL0_ZPCTL0_Pos));

‎targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_pwm.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
* @param[in] pwm The base address of PWM module
2929
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
3030
* @param[in] u32Frequency Target generator frequency
31-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
31+
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
3232
* @return Nearest frequency clock in nano second
3333
* @note Since every two channels, (0 & 1), (2 & 3), (4 & 5), shares a prescaler. Call this API to configure PWM frequency may affect
3434
* existing frequency of other channel.
@@ -38,23 +38,23 @@ uint32_t PWM_ConfigOutputChannel (PWM_T *pwm,
3838
uint32_t u32Frequency,
3939
uint32_t u32DutyCycle)
4040
{
41-
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
41+
return PWM_ConfigOutputChannel2(pwm, u32ChannelNum, u32Frequency, u32DutyCycle*100, 1);
4242
}
4343

4444
/**
4545
* @brief This function config PWM generator and get the nearest frequency in edge aligned auto-reload mode
4646
* @param[in] pwm The base address of PWM module
4747
* @param[in] u32ChannelNum PWM channel number. Valid values are between 0~5
4848
* @param[in] u32Frequency Target generator frequency
49-
* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
49+
* @param[in] u32HighDutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 10000. 1000 means 10%, 2000 means 20%...
5050
* @return Nearest frequency clock in nano second
5151
* @note Since every two channels, (0 & 1), (2 & 3), (4 & 5), shares a prescaler. Call this API to configure PWM frequency may affect
5252
* existing frequency of other channel.
5353
*/
5454
uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
5555
uint32_t u32ChannelNum,
5656
uint32_t u32Frequency,
57-
uint32_t u32DutyCycle,
57+
uint32_t u32HighDutyCycle,
5858
uint32_t u32Frequency2)
5959
{
6060
uint32_t i;
@@ -132,11 +132,11 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
132132
pwm->CLKSEL = (pwm->CLKSEL & ~(PWM_CLKSEL_CLKSEL0_Msk << (4 * u32ChannelNum))) | (u8Divider << (4 * u32ChannelNum));
133133
pwm->CTL |= (PWM_CTL_CH0MOD_Msk << (u32ChannelNum * 8));
134134
while((pwm->INTSTS & (PWM_INTSTS_DUTY0SYNC_Msk << u32ChannelNum)) == (PWM_INTSTS_DUTY0SYNC_Msk << u32ChannelNum));
135-
if(u32DutyCycle == 0)
135+
if(u32HighDutyCycle == 0)
136136
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) &= ~PWM_DUTY_CM_Msk;
137137
else {
138138
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) &= ~PWM_DUTY_CM_Msk;
139-
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) |= ((u32DutyCycle * (u16CNR + 1) / 10000 - 1) << PWM_DUTY_CM_Pos);
139+
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) |= ((u32HighDutyCycle * (u16CNR + 1) / 10000 - 1) << PWM_DUTY_CM_Pos);
140140
}
141141
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) &= ~PWM_DUTY_CN_Msk;
142142
*(__IO uint32_t *) (&pwm->DUTY0 + 3 * u32ChannelNum) |= u16CNR;

‎targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_pwm.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ uint32_t PWM_ConfigOutputChannel(PWM_T *pwm,
168168
uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm,
169169
uint32_t u32ChannelNum,
170170
uint32_t u32Frequency,
171-
uint32_t u32DutyCycle,
171+
uint32_t u32HighDutyCycle,
172172
uint32_t u32Frequency2);
173173
uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
174174
uint32_t u32ChannelNum,

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