Correct MKR Vidor 4000 PB09 notes

This is not LED_BLUE, it is SAM_INT_OUT, as seen in [VidorFPGA pin assignments](https://github.com/vidor-libraries/VidorFPGA/blob/master/constraints/MKRVIDOR4000/vidor_s_pins.qsf#L236) which connects to FPGA pin N2.

Author: sameer

variants/mkrvidor4000/variant.cpp

@@ -138,7 +138,7 @@ const PinDescription g_APinDescription[] = {
  +------------+------------------+--------+-----------------+--------+-----+-----+-----+-----+---------+---------+--------+--------+----------+----------+
  | 31         |                  |  PA28  | FPGA MB INT     |   08   |     |     |     |     |         |         |        |        |          | GCLK_IO0 |
  | 32         |                  |  PB08  | LED_RED_BUILTIN |   08   |  02 |     | Y14 |     |         |   4/00  |  TC4/0 |        |          |          |
- | 33         |                  |  PB09  | LED_BLUE        |  *09   |  03 |     | Y15 |     |         |   4/01  |  TC4/1 |        |          |          |
+ | 33         |                  |  PB09  | SAM_INT_OUT     |  *09   |  03 |     | Y15 |     |         |   4/01  |  TC4/1 |        |          |          |
  +------------+------------------+--------+-----------------+--------+-----+-----+-----+-----+---------+---------+--------+--------+----------+----------+
  |            | 32768Hz Crystal  |        |                 |        |     |     |     |     |         |         |        |        |          |          |
  | 34         |                  |  PA00  | XIN32           |   00   |     |     |     |     |         |   1/00  | TCC2/0 |        |          |          |