@@ -148,6 +148,7 @@ void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
148148 hdma_dfsdm1_flt0 .Init .Mode = DMA_CIRCULAR ;
149149 hdma_dfsdm1_flt0 .Init .Priority = DMA_PRIORITY_LOW ;
150150 hdma_dfsdm1_flt0 .Init .FIFOMode = DMA_FIFOMODE_DISABLE ;
151+ HAL_DMA_DeInit (& hdma_dfsdm1_flt0 );
151152 if (HAL_DMA_Init (& hdma_dfsdm1_flt0 ) != HAL_OK )
152153 {
153154 Error_Handler ();
@@ -214,7 +215,10 @@ void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
214215 if (DFSDM1_Init == 0 )
215216 {
216217 /* Peripheral clock disable */
217- __HAL_RCC_DFSDM1_CLK_DISABLE ();
218+ if (HAL_RCC_DFSDM1_CLK_ENABLED > 0 ) {
219+ __HAL_RCC_DFSDM1_CLK_DISABLE ();
220+ HAL_RCC_DFSDM1_CLK_ENABLED -- ;
221+ }
218222
219223 /**DFSDM1 GPIO Configuration
220224 PD10 ------> DFSDM1_CKOUT
@@ -245,7 +249,10 @@ void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
245249 if (DFSDM1_Init == 0 )
246250 {
247251 /* Peripheral clock disable */
248- __HAL_RCC_DFSDM1_CLK_DISABLE ();
252+ if (HAL_RCC_DFSDM1_CLK_ENABLED > 0 ) {
253+ __HAL_RCC_DFSDM1_CLK_DISABLE ();
254+ HAL_RCC_DFSDM1_CLK_ENABLED -- ;
255+ }
249256
250257 /**DFSDM1 GPIO Configuration
251258 PD10 ------> DFSDM1_CKOUT
@@ -295,6 +302,7 @@ static int DFSDM_Init(uint32_t frequency)
295302 hdfsdm1_channel2 .Init .Awd .Oversampling = 2000000 /frequency ; /* 2MHz/125 = 16kHz */
296303 hdfsdm1_channel2 .Init .Offset = 0 ;
297304 hdfsdm1_channel2 .Init .RightBitShift = 0 ;
305+ HAL_DFSDM_ChannelDeInit (& hdfsdm1_channel2 );
298306 if (HAL_OK != HAL_DFSDM_ChannelInit (& hdfsdm1_channel2 ))
299307 {
300308 return 0 ;
@@ -313,6 +321,7 @@ static int DFSDM_Init(uint32_t frequency)
313321 hdfsdm1_filter0 .Init .FilterParam .SincOrder = DFSDM_FILTER_FASTSINC_ORDER ;
314322 hdfsdm1_filter0 .Init .FilterParam .Oversampling = 2000000 /frequency ; /* 2MHz/125 = 16kHz */
315323 hdfsdm1_filter0 .Init .FilterParam .IntOversampling = 1 ;
324+ HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
316325 if (HAL_OK != HAL_DFSDM_FilterInit (& hdfsdm1_filter0 ))
317326 {
318327 return 0 ;
@@ -357,6 +366,7 @@ int py_audio_init(size_t channels, uint32_t frequency)
357366
358367 HAL_RCCEx_GetPeriphCLKConfig (& rcc_ex_clk_init_struct );
359368
369+ rcc_ex_clk_init_struct .PeriphClockSelection = RCC_PERIPHCLK_DFSDM1 ;
360370 rcc_ex_clk_init_struct .Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_D2PCLK1 ;
361371
362372 HAL_RCCEx_PeriphCLKConfig (& rcc_ex_clk_init_struct );
@@ -398,13 +408,29 @@ void py_audio_gain_set(int gain_db)
398408
399409void py_audio_deinit ()
400410{
401- py_audio_stop_streaming ();
402- HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
403-
404411 // Disable IRQs
412+ HAL_NVIC_DisableIRQ (DFSDM1_FLT0_IRQn );
413+ HAL_NVIC_DisableIRQ (DFSDM1_FLT1_IRQn );
405414 HAL_NVIC_DisableIRQ (AUDIO_DFSDM1_DMA_IRQ );
406415
416+ if (hdfsdm1_channel2 .Instance != NULL ) {
417+ HAL_DFSDM_ChannelDeInit (& hdfsdm1_channel2 );
418+ hdfsdm1_channel2 .Instance = NULL ;
419+ }
420+
421+ if (hdfsdm1_filter0 .Instance != NULL ) {
422+ //HAL_DFSDM_FilterRegularStop_DMA(&hdfsdm1_filter0);
423+ HAL_DFSDM_FilterDeInit (& hdfsdm1_filter0 );
424+ hdfsdm1_filter0 .Instance = NULL ;
425+ }
426+
427+ if (hdma_dfsdm1_flt0 .Instance != NULL ) {
428+ HAL_DMA_DeInit (& hdma_dfsdm1_flt0 );
429+ hdma_dfsdm1_flt0 .Instance = NULL ;
430+ }
431+
407432 //free(g_pcmbuf);
433+ xfer_status = 0 ;
408434 g_pcmbuf = NULL ;
409435}
410436
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