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27 | 27 |
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28 | 28 | #define NUM_DIGITAL_PINS 20 |
29 | 29 | #define NUM_ANALOG_INPUTS 6 |
30 | | -#define NUM_TESTPOINT_PINS 0 |
31 | | -//#define NUM_TOTAL_PINS (NUM_DIGITAL_PINS + NUM_ANALOG_INPUTS + NUM_TESTPOINT_PINS) |
32 | | -#define NUM_TOTAL_PINS 41 |
| 30 | +#define NUM_TESTPOINT_PINS 9 |
| 31 | +#define NUM_OCCUPIED_PINS 6 // (TOSC1/2, VREF, RESET, DEBUG USART Rx/Tx) |
| 32 | +#define NUM_TOTAL_FREE_PINS (NUM_DIGITAL_PINS + NUM_ANALOG_INPUTS + NUM_TESTPOINT_PINS) |
| 33 | +#define NUM_TOTAL_PINS (NUM_DIGITAL_PINS + NUM_ANALOG_INPUTS + NUM_TESTPOINT_PINS + NUM_OCCUPIED_PINS) |
33 | 34 | #define analogInputToDigitalPin(p) ((p < 6) ? (p) + 14 : NOT_A_PIN) |
34 | 35 |
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35 | 36 | #define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11) |
@@ -161,8 +162,21 @@ const uint8_t PROGMEM digital_pin_to_interrupt[] = { |
161 | 162 | 5, //24 USART0_Tx PA4 |
162 | 163 | 28, //25 LED_BUILTIN PD6 |
163 | 164 | 13, //26 USART3_Rx PB5 |
164 | | - 12 //27 USART3_Tx PB4 |
165 | | -}; |
| 165 | + 12, //27 USART3_Tx PB4 |
| 166 | + 6, // 28 PA6 |
| 167 | + 7, // 29 PA7 |
| 168 | + 11, // 30 PB3 |
| 169 | + 21, // 31 PC7 |
| 170 | + 30, // 32 PE0 |
| 171 | + 31, // 33 PE1 |
| 172 | + 32, // 34 PE2 |
| 173 | + 35, // 35 PF2 |
| 174 | + 36, // 36 PF3 |
| 175 | + 34, // 37 PF0 TOSC 1 |
| 176 | + 35, // 38 PF1 TOSC 2 |
| 177 | + 29, // 39 PD7 VREF |
| 178 | + 40 // 40 PF6 RESET |
| 179 | + }; |
166 | 180 |
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167 | 181 | const uint8_t PROGMEM port_interrupt_offset[] = { |
168 | 182 | 0, //PA |
@@ -201,70 +215,109 @@ const uint8_t PROGMEM digital_pin_to_port[] = { |
201 | 215 | PA, //24 USART0_Tx PA4 |
202 | 216 | PD, //25 LED_BUILTIN PD6 |
203 | 217 | PB, //26 USART3_Rx PB5 |
204 | | - PB //27 USART3_Tx PB4 |
| 218 | + PB, //27 USART3_Tx PB4 |
| 219 | + PA, // 28 PA6 |
| 220 | + PA, // 29 PA7 |
| 221 | + PB, // 30 PB3 |
| 222 | + PC, // 31 PC7 |
| 223 | + PE, // 32 PE0 |
| 224 | + PE, // 33 PE1 |
| 225 | + PE, // 34 PE2 |
| 226 | + PF, // 35 PF2 |
| 227 | + PF, // 36 PF3 |
| 228 | + PF, // 37 PF0 TOSC 1 |
| 229 | + PF, // 38 PF1 TOSC 2 |
| 230 | + PD, // 39 PD7 VREF |
| 231 | + PF // 40 PF6 RESET |
205 | 232 | }; |
206 | 233 |
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207 | 234 | /* Use this for accessing PINnCTRL register */ |
208 | 235 | const uint8_t PROGMEM digital_pin_to_bit_position[] = { |
209 | | - PIN5_bp, //0 USART1_Tx PC5 |
210 | | - PIN4_bp, //1 USART1_Tx PC4 |
211 | | - PIN0_bp, //2 PA0 |
212 | | - PIN5_bp, //3 PF5 |
213 | | - PIN6_bp, //4 PC6 |
214 | | - PIN2_bp, //5 PB2 |
215 | | - PIN4_bp, //6 PF4 |
216 | | - PIN1_bp, //7 PA1 |
217 | | - PIN3_bp, //8 PE3 |
218 | | - PIN0_bp, //9 PB0 |
219 | | - PIN1_bp, //10 PB1 |
220 | | - PIN0_bp, //11 PC0 |
221 | | - PIN1_bp, //12 PC1 |
222 | | - PIN2_bp, //13 PC2 |
223 | | - PIN0_bp, //14 AI0 PD0 |
224 | | - PIN1_bp, //15 AI1 PD1 |
225 | | - PIN2_bp, //16 AI2 PD2 |
226 | | - PIN3_bp, //17 AI3 PD3 |
227 | | - PIN4_bp, //18 AI4 PD4 |
228 | | - PIN5_bp, //19 AI5 PD5 |
229 | | - PIN2_bp, //20 TWI_SDA PA2 |
230 | | - PIN3_bp, //21 TWI_SCL PA3 |
231 | | - PIN3_bp, //22 SPI SS PC3 |
232 | | - PIN4_bp, //23 USART0_Rx PA5 |
233 | | - PIN5_bp, //24 USART0_Tx PA4 |
234 | | - PIN6_bp, //25 LED_BUILTIN PD6 |
235 | | - PIN5_bp, //26 USART3_Rx PB5 |
236 | | - PIN4_bp //27 USART3_Tx PB4 |
| 236 | + PIN5_bp, //0 USART1_Tx PC5 |
| 237 | + PIN4_bp, //1 USART1_Tx PC4 |
| 238 | + PIN0_bp, //2 PA0 |
| 239 | + PIN5_bp, //3 PF5 |
| 240 | + PIN6_bp, //4 PC6 |
| 241 | + PIN2_bp, //5 PB2 |
| 242 | + PIN4_bp, //6 PF4 |
| 243 | + PIN1_bp, //7 PA1 |
| 244 | + PIN3_bp, //8 PE3 |
| 245 | + PIN0_bp, //9 PB0 |
| 246 | + PIN1_bp, //10 PB1 |
| 247 | + PIN0_bp, //11 PC0 |
| 248 | + PIN1_bp, //12 PC1 |
| 249 | + PIN2_bp, //13 PC2 |
| 250 | + PIN0_bp, //14 AI0 PD0 |
| 251 | + PIN1_bp, //15 AI1 PD1 |
| 252 | + PIN2_bp, //16 AI2 PD2 |
| 253 | + PIN3_bp, //17 AI3 PD3 |
| 254 | + PIN4_bp, //18 AI4 PD4 |
| 255 | + PIN5_bp, //19 AI5 PD5 |
| 256 | + PIN2_bp, //20 TWI_SDA PA2 |
| 257 | + PIN3_bp, //21 TWI_SCL PA3 |
| 258 | + PIN3_bp, //22 SPI SS PC3 |
| 259 | + PIN4_bp, //23 USART0_Rx PA5 |
| 260 | + PIN5_bp, //24 USART0_Tx PA4 |
| 261 | + PIN6_bp, //25 LED_BUILTIN PD6 |
| 262 | + PIN5_bp, //26 USART3_Rx PB5 |
| 263 | + PIN4_bp, //27 USART3_Tx PB4 |
| 264 | + PIN6_bp, // 28 PA6 |
| 265 | + PIN7_bp, // 29 PA7 |
| 266 | + PIN3_bp, // 30 PB3 |
| 267 | + PIN7_bp, // 31 PC7 |
| 268 | + PIN0_bp, // 32 PE0 |
| 269 | + PIN1_bp, // 33 PE1 |
| 270 | + PIN2_bp, // 34 PE2 |
| 271 | + PIN2_bp, // 35 PF2 |
| 272 | + PIN3_bp, // 36 PF3 |
| 273 | + PIN0_bp, // 37 PF0 TOSC 1 |
| 274 | + PIN1_bp, // 38 PF1 TOSC 2 |
| 275 | + PIN7_bp, // 39 PD7 VREF |
| 276 | + PIN6_bp // 40 PF6 RESET |
237 | 277 | }; |
238 | 278 |
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239 | 279 | const uint8_t PROGMEM digital_pin_to_timer[] = { |
240 | | - NOT_ON_TIMER, |
241 | | - NOT_ON_TIMER, |
242 | | - NOT_ON_TIMER, |
243 | | - TIMERB1, // TCB1 WO |
244 | | - NOT_ON_TIMER, |
245 | | - TIMERA0, // TCA0 WO2 |
246 | | - TIMERB0, // TCB0 WO |
247 | | - NOT_ON_TIMER, |
248 | | - NOT_ON_TIMER, |
249 | | - TIMERA0, // TCA0 WO0 |
250 | | - TIMERA0, // TCA0 WO1 |
251 | | - TIMERB2, // TCB2 WO2 |
252 | | - NOT_ON_TIMER, |
253 | | - NOT_ON_TIMER, |
254 | | - NOT_ON_TIMER, |
255 | | - NOT_ON_TIMER, |
256 | | - NOT_ON_TIMER, |
257 | | - NOT_ON_TIMER, |
258 | | - NOT_ON_TIMER, |
259 | | - NOT_ON_TIMER, |
260 | | - NOT_ON_TIMER, |
261 | | - NOT_ON_TIMER, |
262 | | - NOT_ON_TIMER, |
263 | | - NOT_ON_TIMER, |
264 | | - NOT_ON_TIMER, |
265 | | - NOT_ON_TIMER, |
266 | | - NOT_ON_TIMER, |
267 | | - NOT_ON_TIMER |
| 280 | + NOT_ON_TIMER, //0 USART1_Tx PC5 |
| 281 | + NOT_ON_TIMER, //1 USART1_Tx PC4 |
| 282 | + NOT_ON_TIMER, //2 PA0 |
| 283 | + TIMERB1, //3 PF5 // TCB1 WO |
| 284 | + NOT_ON_TIMER, //4 PC6 |
| 285 | + TIMERA0, //5 PB2 // TCA0 WO2 |
| 286 | + TIMERB0, //6 PF4 // TCB0 WO |
| 287 | + NOT_ON_TIMER, //7 PA1 |
| 288 | + NOT_ON_TIMER, //8 PE3 |
| 289 | + TIMERA0, //9 PB0 // TCA0 WO0 |
| 290 | + TIMERA0, //10 PB1 // TCA0 WO1 |
| 291 | + TIMERB2, //11 PC0 // TCB2 WO2 |
| 292 | + NOT_ON_TIMER, //12 PC1 |
| 293 | + NOT_ON_TIMER, //13 PC2 |
| 294 | + NOT_ON_TIMER, //14 AI0 PD0 |
| 295 | + NOT_ON_TIMER, //15 AI1 PD1 |
| 296 | + NOT_ON_TIMER, //16 AI2 PD2 |
| 297 | + NOT_ON_TIMER, //17 AI3 PD3 |
| 298 | + NOT_ON_TIMER, //18 AI4 PD4 |
| 299 | + NOT_ON_TIMER, //19 AI5 PD5 |
| 300 | + NOT_ON_TIMER, //20 TWI_SDA PA2 |
| 301 | + NOT_ON_TIMER, //21 TWI_SCL PA3 |
| 302 | + NOT_ON_TIMER, //22 SPI SS PC3 |
| 303 | + NOT_ON_TIMER, //23 USART0_Rx PA5 |
| 304 | + NOT_ON_TIMER, //24 USART0_Tx PA4 |
| 305 | + NOT_ON_TIMER, //25 LED_BUILTIN PD6 |
| 306 | + NOT_ON_TIMER, //26 USART3_Rx PB5 |
| 307 | + NOT_ON_TIMER, //27 USART3_Tx PB4 |
| 308 | + NOT_ON_TIMER, // 28 PA6 |
| 309 | + NOT_ON_TIMER, // 29 PA7 |
| 310 | + NOT_ON_TIMER, // 30 PB3 |
| 311 | + NOT_ON_TIMER, // 31 PC7 |
| 312 | + NOT_ON_TIMER, // 32 PE0 |
| 313 | + NOT_ON_TIMER, // 33 PE1 |
| 314 | + NOT_ON_TIMER, // 34 PE2 |
| 315 | + NOT_ON_TIMER, // 35 PF2 |
| 316 | + NOT_ON_TIMER, // 36 PF3 |
| 317 | + NOT_ON_TIMER, // 37 PF0 TOSC 1 |
| 318 | + NOT_ON_TIMER, // 38 PF1 TOSC 2 |
| 319 | + NOT_ON_TIMER, // 39 PD7 VREF |
| 320 | + NOT_ON_TIMER, // 40 PF6 RESET |
268 | 321 | }; |
269 | 322 |
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270 | 323 |
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