@@ -110,6 +110,7 @@ typedef struct sStatSpi
110110 int txErr ;
111111 int rxErr ;
112112 int wrongFrame ;
113+ int frameDisalign ;
113114 int lastCmd ;
114115 int lastError ;
115116 unsigned long status ;
@@ -127,6 +128,7 @@ void initStatSpi()
127128 statSpi .timeoutErr = 0 ;
128129 statSpi .timeoutIntErr = 0 ;
129130 statSpi .wrongFrame = 0 ;
131+ statSpi .frameDisalign = 0 ;
130132}
131133
132134void printStatSpi ()
@@ -139,6 +141,7 @@ void printStatSpi()
139141 printk ("spiTmoErr\t: 0x%x\n" , statSpi .timeoutErr );
140142 printk ("spiTmoIntErr\t: 0x%x\n" , statSpi .timeoutIntErr );
141143 printk ("wrongFrame\t: 0x%x\n" , statSpi .wrongFrame );
144+ printk ("disalFrame\t: 0x%x\n" , statSpi .frameDisalign );
142145}
143146
144147cmd_state_t
@@ -259,30 +262,6 @@ void showTTCPstatus()
259262 tcp_debug_print_pcbs ();
260263}
261264
262-
263- inline spi_status_t myspi_read (volatile avr32_spi_t * spi , unsigned short * data )
264- {
265- if (spi -> sr & AVR32_SPI_SR_RDRF_MASK )
266- * data = spi -> rdr >> AVR32_SPI_RDR_RD_OFFSET ;
267- return SPI_OK ;
268- }
269-
270- inline spi_status_t myspi_write (volatile avr32_spi_t * spi , unsigned short data )
271- {
272- unsigned int timeout = SPI_TIMEOUT ;
273-
274- while (!(spi -> sr & AVR32_SPI_SR_TDRE_MASK )) {
275- if (!timeout -- ) {
276- return SPI_ERROR_TIMEOUT ;
277- }
278- }
279-
280- spi -> tdr = data << AVR32_SPI_TDR_TD_OFFSET ;
281-
282- return SPI_OK ;
283- }
284-
285-
286265int write_stream (volatile avr32_spi_t * spi , const char * stream , uint16_t len )
287266{
288267 uint16_t _len = 0 ;
@@ -307,44 +286,19 @@ int write_stream(volatile avr32_spi_t *spi, const char *stream, uint16_t len)
307286 else
308287 {
309288 stream ++ ;
310- unsigned long data = ARD_SPI -> rdr ;
311- data = data ;
289+ spi_read (spi ,& dummy );
312290 }
313291 //SIGN1_UP();
314-
315- // if (myspi_read(spi, &dummy) == SPI_ERROR_TIMEOUT)
316- // {
317- // statSpi.timeoutErr++;
318- // statSpi.rxErr++;
319- // statSpi.lastError = SPI_ERROR_TIMEOUT;
320- // statSpi.status = spi_getStatus(spi);
321- // return SPI_ERROR_TIMEOUT;
322- // }
323292 }while ((!streamExit )&& (_len ++ <= len ));
324- end_write = true;
325-
326- //while (spi_readRegisterFullCheck(spi));
327- spi_read (spi ,& dummy );
328- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
329- {
330- int a = 0 ;
331- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
332- a = rand ();
333- a = a + 5 ;
334- }
335-
336- if (!streamExit )
337- {
293+
294+ if (!streamExit )
295+ {
338296#ifdef _SPI_STATS_
339- statSpi .wrongFrame ++ ;
340- statSpi .lastError = SPI_ERROR_ARGUMENT ;
297+ statSpi .wrongFrame ++ ;
298+ statSpi .lastError = SPI_ERROR_ARGUMENT ;
341299#endif
342- return SPI_ERROR_ARGUMENT ;
343- }
344- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
345- {
346- //SIGN1_DN();
347- }
300+ return SPI_ERROR_ARGUMENT ;
301+ }
348302 return SPI_OK ;
349303}
350304
@@ -357,21 +311,23 @@ void sendError()
357311 while (!spi_writeRegisterEmptyCheck (& AVR32_SPI ));
358312 }
359313 BUSY_FOR_SPI ();
360- WARN ("Send SPI error!" );
314+ WARN ("Send SPI error!\n " );
361315}
362316
363- #define ENABLE_SPI_INT () do { \
317+ #define ENABLE_SPI_INT () do { \
318+ volatile avr32_spi_t *spi = ARD_SPI; \
364319 Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
365320 if (global_interrupt_enabled) Disable_global_interrupt(); \
366- ARD_SPI ->IER.rdrf = 1; \
367- ARD_SPI ->IER.rxbuff = 1; ARD_SPI ->IER.endrx = 1; \
321+ spi ->IER.rdrf = 1; \
322+ spi ->IER.rxbuff = 1; spi ->IER.endrx = 1; \
368323 if (global_interrupt_enabled) Enable_global_interrupt(); \
369324}while(0);
370325
371326#define DISABLE_SPI_INT () do { \
327+ volatile avr32_spi_t *spi = ARD_SPI; \
372328 Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
373329 if (global_interrupt_enabled) Disable_global_interrupt(); \
374- ARD_SPI ->IDR.rdrf = 1; ARD_SPI ->IDR.rxbuff = 1; ARD_SPI ->IDR.endrx = 1; \
330+ spi ->IDR.rdrf = 1; spi ->IDR.rxbuff = 1; spi ->IDR.endrx = 1; \
375331 if (global_interrupt_enabled) Enable_global_interrupt(); \
376332}while(0);
377333
@@ -1494,6 +1450,8 @@ bool checkMsgFormat(uint8_t* _recv, int len, int* offset)
14941450 if ((enableDebug & INFO_WARN_FLAG )&& (len < 20 )) //TODO stamp only short messages wrong
14951451 dump ((char * )_recv , len );
14961452
1453+ STATSPI_DISALIGN_ERROR ();
1454+
14971455 if (recv == NULL )
14981456 return false;
14991457 }
@@ -1552,15 +1510,6 @@ void spi_poll(struct netif* netif) {
15521510 receivedChars = 0 ;
15531511 count = 0 ;
15541512 state = SPI_CMD_IDLE ;
1555- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
1556- {
1557- unsigned long data = ARD_SPI -> rdr ;
1558- data = data ;
1559- if ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )
1560- {
1561- //SIGN1_DN();
1562- }
1563- }
15641513 }
15651514 else
15661515 {
@@ -1577,9 +1526,18 @@ void spi_poll(struct netif* netif) {
15771526 //Available for receiving a new spi data
15781527 AVAIL_FOR_SPI ();
15791528 }
1529+
1530+ #ifdef _SPI_STATS_
1531+ if (statSpi .lastError != 0 )
1532+ {
1533+ WARN ("[E(0x%x) spiStatus:0x%x]\n" , statSpi .lastError , statSpi .status );
1534+ statSpi .lastError = 0 ;
1535+ }
1536+ #endif
15801537}
15811538
1582- inline int spi_slaveReceiveInt (volatile avr32_spi_t * spi , bool startRecvd )
1539+ // ****TEMPORARY
1540+ /*inline*/ int spi_slaveReceiveInt (volatile avr32_spi_t * spi , bool startRecvd )
15831541{
15841542 receivedChars = 0 ;
15851543 int index = 0 ;
@@ -1595,20 +1553,15 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
15951553 }
15961554 do {
15971555 err = SPI_OK ;
1598- //SIGN1_DN();
1599- //spi->tdr = DUMMY_DATA << AVR32_SPI_TDR_TD_OFFSET;
1556+
16001557 while ((spi -> sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK )) !=
16011558 (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK )) {
1602- if (! timeout -- ) {
1559+ if (( timeout -- ) == 0 ) {
16031560 err = SPI_ERROR_TIMEOUT ;
16041561 break ;
16051562 }
16061563 }
16071564 _receiveBuffer [index ] = (spi -> rdr >> AVR32_SPI_RDR_RD_OFFSET ) & 0x00ff ;
1608- if (_receiveBuffer [index ] == START_CMD ){
1609- TOGGLE_SIG0 ();
1610- //SIGN1_UP();
1611- }
16121565 if (err == SPI_OK ) {
16131566 ++ index ;
16141567 ++ receivedChars ;
@@ -1629,51 +1582,35 @@ inline int spi_slaveReceiveInt(volatile avr32_spi_t *spi, bool startRecvd)
16291582 return err ;
16301583}
16311584
1632-
1633- uint32_t data = 0 ;
1634- uint32_t status_register = 0 ;
1635-
16361585#if defined (__GNUC__ )
16371586__attribute__((__interrupt__ ))
16381587#elif defined (__ICCAVR32__ )
16391588__interrupt
16401589#endif
16411590static void spi_int_handler (void )
16421591{
1643- //SIGN2_DN();
1592+ volatile avr32_spi_t * spi = ARD_SPI ;
1593+ //DEB_PIN_DN();
16441594 //eic_clear_interrupt_line(&AVR32_EIC, AVR32_SPI0_IRQ);
16451595 AVAIL_FOR_SPI ();
16461596 DISABLE_SPI_INT ();
16471597
1648- //TODO verify why after the reply write the RDRF is set
16491598 unsigned short dummy = 0 ;
1650- if ((end_write )&& ((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )) {
1651- end_write = false;
1652- //SIGN1_UP();
1653- spi_read (ARD_SPI , & dummy );
1654- }
16551599
1656- if (((ARD_SPI -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )|| (dummy == START_CMD ))
1600+ if (((spi -> sr & AVR32_SPI_SR_RDRF_MASK ) != 0 )|| (dummy == START_CMD ))
16571601 {
16581602 int err = spi_slaveReceiveInt (ARD_SPI , dummy == START_CMD );
1659- if (err ! = SPI_OK )
1603+ if (err = = SPI_OK )
16601604 {
1661- #ifdef _SPI_STATS_
1662- //TODO verify why at the end of cmd cycle RDF bit is high without any data recv.
1663- if (statSpi .lastError != SPI_ERROR_TIMEOUT )
1664- INFO_SPI ("[E(0x%x):%d spiStatus:%d]\n" , statSpi .lastError , err , statSpi .status );
1665- #endif
1666- }else {
16671605 BUSY_FOR_SPI ();
16681606 startReply = true;
16691607 //maintain disable interrupt to send the reply command
1670- //SIGN2_UP ();
1608+ //DEB_PIN_UP ();
16711609 return ;
16721610 }
1673-
16741611 }
16751612 ENABLE_SPI_INT ();
1676- //SIGN2_UP ();
1613+ //DEB_PIN_UP ();
16771614}
16781615
16791616inline spi_status_t spi_read8 (volatile avr32_spi_t * spi , unsigned char * data )
0 commit comments