@@ -38,6 +38,14 @@ struct regmap_field;
3838struct snd_ac97 ;
3939struct sdw_slave ;
4040
41+ /*
42+ * regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a
43+ * device address and a register address.
44+ */
45+ #define REGMAP_MDIO_C45_DEVAD_SHIFT 16
46+ #define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16)
47+ #define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0)
48+
4149/* An enum of all the supported cache types */
4250enum regcache_type {
4351 REGCACHE_NONE ,
@@ -512,6 +520,7 @@ typedef void (*regmap_hw_free_context)(void *context);
512520 * to perform locking. This field is ignored if custom lock/unlock
513521 * functions are used (see fields lock/unlock of
514522 * struct regmap_config).
523+ * @free_on_exit: kfree this on exit of regmap
515524 * @write: Write operation.
516525 * @gather_write: Write operation with split register/value, return -ENOTSUPP
517526 * if not implemented on a given device.
@@ -540,10 +549,10 @@ typedef void (*regmap_hw_free_context)(void *context);
540549 * DEFAULT, BIG is assumed.
541550 * @max_raw_read: Max raw read size that can be used on the bus.
542551 * @max_raw_write: Max raw write size that can be used on the bus.
543- * @free_on_exit: kfree this on exit of regmap
544552 */
545553struct regmap_bus {
546554 bool fast_io ;
555+ bool free_on_exit ;
547556 regmap_hw_write write ;
548557 regmap_hw_gather_write gather_write ;
549558 regmap_hw_async_write async_write ;
@@ -560,7 +569,6 @@ struct regmap_bus {
560569 enum regmap_endian val_format_endian_default ;
561570 size_t max_raw_read ;
562571 size_t max_raw_write ;
563- bool free_on_exit ;
564572};
565573
566574/*
@@ -1532,9 +1540,6 @@ struct regmap_irq_chip_data;
15321540 * @config_base: Base address for IRQ type config regs. If null unsupported.
15331541 * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
15341542 * @init_ack_masked: Ack all masked interrupts once during initalization.
1535- * @mask_invert: Inverted mask register: cleared bits are masked out.
1536- * Deprecated; prefer describing an inverted mask register as
1537- * an unmask register.
15381543 * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set
15391544 * both @mask_base and @unmask_base. If false, mask and unmask bits are
15401545 * inverted (which is deprecated behavior); if true, bits will not be
@@ -1547,8 +1552,6 @@ struct regmap_irq_chip_data;
15471552 * @ack_invert: Inverted ack register: cleared bits for ack.
15481553 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
15491554 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
1550- * @type_invert: Invert the type flags. Deprecated, use config registers
1551- * instead.
15521555 * @type_in_mask: Use the mask registers for controlling irq type. Use this if
15531556 * the hardware provides separate bits for rising/falling edge
15541557 * or low/high level interrupts and they should be combined into
@@ -1618,14 +1621,12 @@ struct regmap_irq_chip {
16181621 const unsigned int * config_base ;
16191622 unsigned int irq_reg_stride ;
16201623 unsigned int init_ack_masked :1 ;
1621- unsigned int mask_invert :1 ;
16221624 unsigned int mask_unmask_non_inverted :1 ;
16231625 unsigned int use_ack :1 ;
16241626 unsigned int ack_invert :1 ;
16251627 unsigned int clear_ack :1 ;
16261628 unsigned int wake_invert :1 ;
16271629 unsigned int runtime_pm :1 ;
1628- unsigned int type_invert :1 ;
16291630 unsigned int type_in_mask :1 ;
16301631 unsigned int clear_on_unmask :1 ;
16311632 unsigned int not_fixed_stride :1 ;
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