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lines changed Original file line number Diff line number Diff line change 33- Evaluation board product page: [ ADRV9361-Z7035] ( https://www.analog.com/adrv9361-z7035 )
44- System documentation: https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom
55- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/adrv9361z7035/index.html
6+ - Evaluation board VADJ range: 1.2V - 1.8V
67
78## Supported parts
89
1213
1314## Building the project
1415
15- Please enter the folder for the FPGA carrier you want to use and read the README.md.
16+ Please enter the folder for the FPGA carrier you want to use and read the README.md.
Original file line number Diff line number Diff line change 1+ <!-- no_build_example, no_no_os -->
2+
13# ADRV9361Z7035/CCBOB-CMOS HDL Project
24
35CCBOB_CMOS means [ ADRV1CRR-BOB] ( https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/adrv1crr-bob.html )
46to be used with CMOS version of the signals.
57
8+ - VADJ with which it was tested in hardware: 1.8V
9+
610## Building the project
711
812```
913cd projects/adrv9361z7035/ccbob_cmos
1014make
1115```
1216
13- Corresponding device tree: [ zynq-adrv9361-z7035-bob-cmos.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob-cmos.dts )
17+ Corresponding device tree: [ zynq-adrv9361-z7035-bob-cmos.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob-cmos.dts )
Original file line number Diff line number Diff line change 1+ <!-- no_build_example, no_no_os -->
2+
13# ADRV9361Z7035/CCBOB-LVDS HDL Project
24
35CCBOB_LVDS means [ ADRV1CRR-BOB] ( https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/adrv1crr-bob.html )
46to be used with LVDS version of the signals.
57
8+ - VADJ with which it was tested in hardware: 1.8V
9+
610## Building the project
711
812```
913cd projects/adrv9361z7035/ccbob_lvds
1014make
1115```
1216
13- Corresponding device tree: [ zynq-adrv9361-z7035-bob.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob.dts )
17+ Corresponding device tree: [ zynq-adrv9361-z7035-bob.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob.dts )
Original file line number Diff line number Diff line change 1+ <!-- no_build_example, no_no_os -->
2+
13# ADRV9361Z7035/CCFMC-LVDS HDL Project
24
35CCFMC_LVDS means [ ADRV1CRR-FMC] ( https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/adrv1crr-fmc.html )
46to be used with LVDS version of the signals.
57
8+ - VADJ with which it was tested in hardware: 1.8V
9+
610## Building the project
711
812```
913cd projects/adrv9361z7035/ccfmc_lvds
1014make
1115```
1216
13- Corresponding device tree: [ zynq-adrv9361-z7035-fmc.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-fmc.dts )
17+ Corresponding device tree: [ zynq-adrv9361-z7035-fmc.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-fmc.dts )
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