@@ -412,16 +412,26 @@ def get_iddr(clk,d,q0,q1):
412412 o_Q1 = q1 [bit ]
413413 )
414414
415- def get_oddr (clk ,d0 ,d1 ,tx ,q0 ,q1 ):
415+ def get_oddr (clk ,d0 ,d1 ,q ):
416+ for bit in range (len (q )):
417+ m .submodules += Instance ("ODDR" ,
418+ p_TXCLK_POL = 0 , # default -> Q1 changes on posedge of CLK
419+ i_CLK = clk ,
420+ i_D0 = d0 [bit ],
421+ i_D1 = d1 [bit ],
422+ o_Q0 = q [bit ]
423+ )
424+
425+ def get_oeddr (clk ,d0 ,d1 ,tx ,q0 ,q1 ):
416426 for bit in range (len (q0 )):
417427 m .submodules += Instance ("ODDR" ,
418428 p_TXCLK_POL = 0 , # default -> Q1 changes on posedge of CLK
419429 i_CLK = clk ,
420430 i_D0 = d0 [bit ],
421431 i_D1 = d1 [bit ],
422- i_TX = tx [ bit ] ,
432+ i_TX = tx ,
423433 o_Q0 = q0 [bit ],
424- o_Q1 = q1 [ bit ]
434+ o_Q1 = q1
425435 )
426436
427437 def get_ineg (y , invert ):
@@ -480,8 +490,10 @@ def get_oneg(a, invert):
480490 elif pin .xdr == 2 :
481491 if "i" in pin .dir :
482492 get_iddr (pin .i_clk , i , pin_i0 , pin_i1 )
483- if pin .dir in ("o" , "oe" , "io" ):
484- get_oddr (pin .o_clk , pin_o0 , pin_o1 , ~ pin_oe , o , t )
493+ if pin .dir in ("o" ,):
494+ get_oddr (pin .o_clk , pin_o0 , pin_o1 , o )
495+ if pin .dir in ("oe" , "io" ):
496+ get_oeddr (pin .o_clk , pin_o0 , pin_o1 , ~ pin .oe , o , t )
485497 else :
486498 assert False
487499
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