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1 parent 0f02fc9 commit 120ea53Copy full SHA for 120ea53
nmigen_soc/test/test_csr_bus.py
@@ -85,6 +85,7 @@ def test_data_width_wrong(self):
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class DecoderTestCase(unittest.TestCase):
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def setUp(self):
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self.dut = Decoder(addr_width=16, data_width=8)
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+ Fragment.get(self.dut, platform=None) # silence UnusedElaboratable
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def test_add_4b(self):
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self.assertEqual(self.dut.add(Element(4, "rw")),
@@ -197,6 +198,7 @@ def sim_test():
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class DecoderAlignedTestCase(unittest.TestCase):
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self.dut = Decoder(addr_width=16, data_width=8, alignment=2)
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def test_add_two(self):
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self.assertEqual(self.dut.add(Element(8, "rw")),
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