genesys2: correctly specify I/O attributes for VADJ banks

Author: ktemkin

nmigen_boards/genesys2.py

@@ -24,7 +24,7 @@ def __init__(self, JP6="2V5"):
         self._JP6 = JP6
 
     def bank15_16_17_iostandard(self):
-        return "LVCMOS" + self._JP6
+        return "LVCMOS" + self._JP6.replace('V', '')
 
     default_rst = "rst"
     default_clk = "clk"