update tinyusb to hathach/tinyusb@1a783b3

Author: hathach

src/class/audio/audio.h

@@ -661,6 +661,7 @@ typedef struct TU_ATTR_PACKED
   uint16_t wTotalLength      ; ///< Total number of bytes returned for the class-specific AudioControl interface descriptor. Includes the combined length of this descriptor header and all Clock Source, Unit and Terminal descriptors.
   uint8_t bmControls         ; ///< See: audio_cs_ac_interface_control_pos_t.
 } audio_desc_cs_ac_interface_t;
+TU_VERIFY_STATIC(sizeof(audio_desc_cs_ac_interface_t) == 9, "size is not correct");
 
 /// AUDIO Clock Source Descriptor (4.7.2.1)
 typedef struct TU_ATTR_PACKED

src/class/audio/audio_device.c

@@ -208,15 +208,15 @@ tu_static CFG_TUD_MEM_SECTION struct {
 #endif// CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // Control buffers
-tu_static uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
-
-#if CFG_TUD_AUDIO > 1
-tu_static uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
-#endif
-
-#if CFG_TUD_AUDIO > 2
-tu_static uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
-#endif
+tu_static CFG_TUD_MEM_SECTION struct {
+  TUD_EPBUF_DEF(buf1, CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ);
+  #if CFG_TUD_AUDIO > 1
+  TUD_EPBUF_DEF(buf2, CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ);
+  #endif
+  #if CFG_TUD_AUDIO > 2
+  TUD_EPBUF_DEF(buf3, CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ);
+  #endif
+} ctrl_buf;
 
 // Active alternate setting of interfaces
 tu_static uint8_t alt_setting_1[CFG_TUD_AUDIO_FUNC_1_N_AS_INT];
@@ -628,10 +628,6 @@ static uint8_t audiod_get_audio_fct_idx(audiod_function_t *audio);
 
 #if (CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL || CFG_TUD_AUDIO_ENABLE_ENCODING)) || (CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING)
 static void audiod_parse_for_AS_params(audiod_function_t *audio, uint8_t const *p_desc, uint8_t const *p_desc_end, uint8_t const as_itf);
-
-static inline uint8_t tu_desc_subtype(void const *desc) {
-  return ((uint8_t const *) desc)[2];
-}
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
@@ -1227,18 +1223,18 @@ void audiod_init(void) {
     // Initialize control buffers
     switch (i) {
       case 0:
-        audio->ctrl_buf = ctrl_buf_1;
+        audio->ctrl_buf = ctrl_buf.buf1;
         audio->ctrl_buf_sz = CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ;
         break;
 #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ > 0
       case 1:
-        audio->ctrl_buf = ctrl_buf_2;
+        audio->ctrl_buf = ctrl_buf.buf2;
         audio->ctrl_buf_sz = CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ;
         break;
 #endif
 #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ > 0
       case 2:
-        audio->ctrl_buf = ctrl_buf_3;
+        audio->ctrl_buf = ctrl_buf.buf3;
         audio->ctrl_buf_sz = CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ;
         break;
 #endif

src/class/cdc/cdc_device.c

@@ -82,7 +82,7 @@ typedef struct {
 static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC];
 
-static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
+static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT();
 
 static bool _prep_out_transaction(uint8_t itf) {
   const uint8_t rhport = 0;
@@ -119,9 +119,9 @@ static bool _prep_out_transaction(uint8_t itf) {
 // APPLICATION API
 //--------------------------------------------------------------------+
 
-bool tud_cdc_configure_fifo(const tud_cdc_configure_fifo_t* cfg) {
-  TU_VERIFY(cfg);
-  _cdcd_fifo_cfg = (*cfg);
+bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg) {
+  TU_VERIFY(driver_cfg);
+  _cdcd_cfg = *driver_cfg;
   return true;
 }
 
@@ -175,7 +175,7 @@ void tud_cdc_n_read_flush(uint8_t itf) {
 //--------------------------------------------------------------------+
 uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
+  uint16_t wr_count = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
 
   // flush if queue more than packet size
   if (tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
@@ -186,7 +186,7 @@ uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
     tud_cdc_n_write_flush(itf);
   }
 
-  return ret;
+  return wr_count;
 }
 
 uint32_t tud_cdc_n_write_flush(uint8_t itf) {
@@ -233,8 +233,6 @@ bool tud_cdc_n_write_clear(uint8_t itf) {
 //--------------------------------------------------------------------+
 void cdcd_init(void) {
   tu_memclr(_cdcd_itf, sizeof(_cdcd_itf));
-  tu_memclr(&_cdcd_fifo_cfg, sizeof(_cdcd_fifo_cfg));
-
   for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
 
@@ -249,10 +247,10 @@ void cdcd_init(void) {
     // Config RX fifo
     tu_fifo_config(&p_cdc->rx_ff, p_cdc->rx_ff_buf, TU_ARRAY_SIZE(p_cdc->rx_ff_buf), 1, false);
 
-    // Config TX fifo as overwritable at initialization and will be changed to non-overwritable
-    // if terminal supports DTR bit. Without DTR we do not know if data is actually polled by terminal.
-    // In this way, the most current data is prioritized.
-    tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, true);
+    // TX fifo can be configured to change to overwritable if not connected (DTR bit not set). Without DTR we do not
+    // know if data is actually polled by terminal. This way the most current data is prioritized.
+    // Default: is overwritable
+    tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, _cdcd_cfg.tx_overwritabe_if_not_connected);
 
     #if OSAL_MUTEX_REQUIRED
     osal_mutex_t mutex_rd = osal_mutex_create(&p_cdc->rx_ff_mutex);
@@ -294,13 +292,13 @@ void cdcd_reset(uint8_t rhport) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
 
     tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
-    if (!_cdcd_fifo_cfg.rx_persistent) {
+    if (!_cdcd_cfg.rx_persistent) {
       tu_fifo_clear(&p_cdc->rx_ff);
     }
-    if (!_cdcd_fifo_cfg.tx_persistent) {
+    if (!_cdcd_cfg.tx_persistent) {
       tu_fifo_clear(&p_cdc->tx_ff);
     }
-    tu_fifo_set_overwritable(&p_cdc->tx_ff, true);
+    tu_fifo_set_overwritable(&p_cdc->tx_ff, _cdcd_cfg.tx_overwritabe_if_not_connected);
   }
 }
 
@@ -414,8 +412,12 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
 
         p_cdc->line_state = (uint8_t) request->wValue;
 
-        // Disable fifo overwriting if DTR bit is set
-        tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
+        // If enabled: fifo overwriting is disabled if DTR bit is set and vice versa
+        if (_cdcd_cfg.tx_overwritabe_if_not_connected) {
+          tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
+        } else {
+          tu_fifo_set_overwritable(&p_cdc->tx_ff, false);
+        }
 
         TU_LOG_DRV("  Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
 
@@ -496,7 +498,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
       // xferred_bytes is multiple of EP Packet size and not zero
       if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
         if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
-          usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0);
+          TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0));
         }
       }
     }

src/class/cdc/cdc_device.h

@@ -48,14 +48,24 @@
 //--------------------------------------------------------------------+
 // Driver Configuration
 //--------------------------------------------------------------------+
-
 typedef struct TU_ATTR_PACKED {
-  uint8_t rx_persistent : 1; // keep rx fifo on bus reset or disconnect
-  uint8_t tx_persistent : 1; // keep tx fifo on bus reset or disconnect
-} tud_cdc_configure_fifo_t;
+  uint8_t rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
+  uint8_t tx_persistent : 1; // keep tx fifo data even with reset or disconnect
+  uint8_t tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
+} tud_cdc_configure_t;
+
+#define TUD_CDC_CONFIGURE_DEFAULT() { \
+  .rx_persistent = 0, \
+  .tx_persistent = 0, \
+  .tx_overwritabe_if_not_connected = 1, \
+}
+
+// Configure CDC driver behavior
+bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg);
 
-// Configure CDC FIFOs behavior
-bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg);
+// Backward compatible
+#define tud_cdc_configure_fifo_t tud_cdc_configure_t
+#define tud_cdc_configure_fifo   tud_cdc_configure
 
 //--------------------------------------------------------------------+
 // Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1

src/class/cdc/cdc_host.c

@@ -691,10 +691,10 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
     }
   } else if ( ep_addr == p_cdc->stream.rx.ep_addr ) {
     #if CFG_TUH_CDC_FTDI
-    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) {
+    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI && xferred_bytes > 2) {
       // FTDI reserve 2 bytes for status
       // uint8_t status[2] = {p_cdc->stream.rx.ep_buf[0], p_cdc->stream.rx.ep_buf[1]};
-      tu_edpt_stream_read_xfer_complete_offset(&p_cdc->stream.rx, xferred_bytes, 2);
+      tu_edpt_stream_read_xfer_complete_with_buf(&p_cdc->stream.rx, p_cdc->stream.rx.ep_buf+2, xferred_bytes-2);
     }else
     #endif
     {

src/class/cdc/cdc_host.h

@@ -49,22 +49,22 @@
 
 // RX FIFO size
 #ifndef CFG_TUH_CDC_RX_BUFSIZE
-#define CFG_TUH_CDC_RX_BUFSIZE USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
 #endif
 
 // RX Endpoint size
 #ifndef CFG_TUH_CDC_RX_EPSIZE
-#define CFG_TUH_CDC_RX_EPSIZE  USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_RX_EPSIZE  TUH_EPSIZE_BULK_MPS
 #endif
 
 // TX FIFO size
 #ifndef CFG_TUH_CDC_TX_BUFSIZE
-#define CFG_TUH_CDC_TX_BUFSIZE USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
 #endif
 
 // TX Endpoint size
 #ifndef CFG_TUH_CDC_TX_EPSIZE
-#define CFG_TUH_CDC_TX_EPSIZE  USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_TX_EPSIZE  TUH_EPSIZE_BULK_MPS
 #endif
 
 //--------------------------------------------------------------------+