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tlivelydtig
tlively
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dtig
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Update opcodes to include space for v2i64 comparison operations (#39)
* Add v2i64 comparison operations * Add opcode space holes instead of new instructions * Strikethrough i64x2.mul * Strikethrough opcode numbers, too * Remove nonexistent instructions entirely
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‎proposals/simd/BinarySIMD.md‎

Lines changed: 105 additions & 105 deletions
Original file line numberDiff line numberDiff line change
@@ -62,108 +62,108 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
6262
| `i8x16.mul` | 32 | - |
6363
| `i16x8.mul` | 33 | - |
6464
| `i32x4.mul` | 34 | - |
65-
| `i8x16.neg` | 35 | - |
66-
| `i16x8.neg` | 36 | - |
67-
| `i32x4.neg` | 37 | - |
68-
| `i64x2.neg` | 38 | - |
69-
| `i8x16.add_saturate_s` | 39 | - |
70-
| `i8x16.add_saturate_u` | 40 | - |
71-
| `i16x8.add_saturate_s` | 41 | - |
72-
| `i16x8.add_saturate_u` | 42 | - |
73-
| `i8x16.sub_saturate_s` | 43 | - |
74-
| `i8x16.sub_saturate_u` | 44 | - |
75-
| `i16x8.sub_saturate_s` | 45 | - |
76-
| `i16x8.sub_saturate_u` | 46 | - |
77-
| `i8x16.shl` | 47 | - |
78-
| `i16x8.shl` | 48 | - |
79-
| `i32x4.shl` | 49 | - |
80-
| `i64x2.shl` | 50 | - |
81-
| `i8x16.shr_s` | 51 | - |
82-
| `i8x16.shr_u` | 52 | - |
83-
| `i16x8.shr_s` | 53 | - |
84-
| `i16x8.shr_u` | 54 | - |
85-
| `i32x4.shr_s` | 55 | - |
86-
| `i32x4.shr_u` | 56 | - |
87-
| `i64x2.shr_s` | 57 | - |
88-
| `i64x2.shr_u` | 58 | - |
89-
| `v128.and` | 59 | - |
90-
| `v128.or` | 60 | - |
91-
| `v128.xor` | 61 | - |
92-
| `v128.not` | 62 | - |
93-
| `v128.bitselect` | 63 | - |
94-
| `i8x16.any_true` | 64 | - |
95-
| `i16x8.any_true` | 65 | - |
96-
| `i32x4.any_true` | 66 | - |
97-
| `i64x2.any_true` | 67 | - |
98-
| `i8x16.all_true` | 68 | - |
99-
| `i16x8.all_true` | 69 | - |
100-
| `i32x4.all_true` | 70 | - |
101-
| `i64x2.all_true` | 71 | - |
102-
| `i8x16.eq` | 72 | - |
103-
| `i16x8.eq` | 73 | - |
104-
| `i32x4.eq` | 74 | - |
105-
| `f32x4.eq` | 75 | - |
106-
| `f64x2.eq` | 76 | - |
107-
| `i8x16.ne` | 77 | - |
108-
| `i16x8.ne` | 78 | - |
109-
| `i32x4.ne` | 79 | - |
110-
| `f32x4.ne` | 80 | - |
111-
| `f64x2.ne` | 81 | - |
112-
| `i8x16.lt_s` | 82 | - |
113-
| `i8x16.lt_u` | 83 | - |
114-
| `i16x8.lt_s` | 84 | - |
115-
| `i16x8.lt_u` | 85 | - |
116-
| `i32x4.lt_s` | 86 | - |
117-
| `i32x4.lt_u` | 87 | - |
118-
| `f32x4.lt` | 88 | - |
119-
| `f64x2.lt` | 89 | - |
120-
| `i8x16.le_s` | 90 | - |
121-
| `i8x16.le_u` | 91 | - |
122-
| `i16x8.le_s` | 92 | - |
123-
| `i16x8.le_u` | 93 | - |
124-
| `i32x4.le_s` | 94 | - |
125-
| `i32x4.le_u` | 95 | - |
126-
| `f32x4.le` | 96 | - |
127-
| `f64x2.le` | 97 | - |
128-
| `i8x16.gt_s` | 98 | - |
129-
| `i8x16.gt_u` | 99 | - |
130-
| `i16x8.gt_s` | 100 | - |
131-
| `i16x8.gt_u` | 101 | - |
132-
| `i32x4.gt_s` | 102 | - |
133-
| `i32x4.gt_u` | 103 | - |
134-
| `f32x4.gt` | 104 | - |
135-
| `f64x2.gt` | 105 | - |
136-
| `i8x16.ge_s` | 106 | - |
137-
| `i8x16.ge_u` | 107 | - |
138-
| `i16x8.ge_s` | 108 | - |
139-
| `i16x8.ge_u` | 109 | - |
140-
| `i32x4.ge_s` | 110 | - |
141-
| `i32x4.ge_u` | 111 | - |
142-
| `f32x4.ge` | 112 | - |
143-
| `f64x2.ge` | 113 | - |
144-
| `f32x4.neg` | 114 | - |
145-
| `f64x2.neg` | 115 | - |
146-
| `f32x4.abs` | 116 | - |
147-
| `f64x2.abs` | 117 | - |
148-
| `f32x4.min` | 118 | - |
149-
| `f64x2.min` | 119 | - |
150-
| `f32x4.max` | 120 | - |
151-
| `f64x2.max` | 121 | - |
152-
| `f32x4.add` | 122 | - |
153-
| `f64x2.add` | 123 | - |
154-
| `f32x4.sub` | 124 | - |
155-
| `f64x2.sub` | 125 | - |
156-
| `f32x4.div` | 126 | - |
157-
| `f64x2.div` | 127 | - |
158-
| `f32x4.mul` | 128 | - |
159-
| `f64x2.mul` | 129 | - |
160-
| `f32x4.sqrt` | 130 | - |
161-
| `f64x2.sqrt` | 131 | - |
162-
| `f32x4.convert_s/i32x4` | 132 | - |
163-
| `f32x4.convert_u/i32x4` | 133 | - |
164-
| `f64x2.convert_s/i64x2` | 134 | - |
165-
| `f64x2.convert_u/i64x2` | 135 | - |
166-
| `i32x4.trunc_s/f32x4:sat` | 136 | - |
167-
| `i32x4.trunc_u/f32x4:sat` | 137 | - |
168-
| `i64x2.trunc_s/f64x2:sat` | 138 | - |
169-
| `i64x2.trunc_u/f64x2:sat` | 139 | - |
65+
| `i8x16.neg` | 36 | - |
66+
| `i16x8.neg` | 37 | - |
67+
| `i32x4.neg` | 38 | - |
68+
| `i64x2.neg` | 39 | - |
69+
| `i8x16.add_saturate_s` | 40 | - |
70+
| `i8x16.add_saturate_u` | 41 | - |
71+
| `i16x8.add_saturate_s` | 42 | - |
72+
| `i16x8.add_saturate_u` | 43 | - |
73+
| `i8x16.sub_saturate_s` | 44 | - |
74+
| `i8x16.sub_saturate_u` | 45 | - |
75+
| `i16x8.sub_saturate_s` | 46 | - |
76+
| `i16x8.sub_saturate_u` | 47 | - |
77+
| `i8x16.shl` | 48 | - |
78+
| `i16x8.shl` | 49 | - |
79+
| `i32x4.shl` | 50 | - |
80+
| `i64x2.shl` | 51 | - |
81+
| `i8x16.shr_s` | 52 | - |
82+
| `i8x16.shr_u` | 53 | - |
83+
| `i16x8.shr_s` | 54 | - |
84+
| `i16x8.shr_u` | 55 | - |
85+
| `i32x4.shr_s` | 56 | - |
86+
| `i32x4.shr_u` | 57 | - |
87+
| `i64x2.shr_s` | 58 | - |
88+
| `i64x2.shr_u` | 59 | - |
89+
| `v128.and` | 60 | - |
90+
| `v128.or` | 61 | - |
91+
| `v128.xor` | 62 | - |
92+
| `v128.not` | 63 | - |
93+
| `v128.bitselect` | 64 | - |
94+
| `i8x16.any_true` | 65 | - |
95+
| `i16x8.any_true` | 66 | - |
96+
| `i32x4.any_true` | 67 | - |
97+
| `i64x2.any_true` | 68 | - |
98+
| `i8x16.all_true` | 69 | - |
99+
| `i16x8.all_true` | 70 | - |
100+
| `i32x4.all_true` | 71 | - |
101+
| `i64x2.all_true` | 72 | - |
102+
| `i8x16.eq` | 73 | - |
103+
| `i16x8.eq` | 74 | - |
104+
| `i32x4.eq` | 75 | - |
105+
| `f32x4.eq` | 77 | - |
106+
| `f64x2.eq` | 78 | - |
107+
| `i8x16.ne` | 79 | - |
108+
| `i16x8.ne` | 80 | - |
109+
| `i32x4.ne` | 81 | - |
110+
| `f32x4.ne` | 83 | - |
111+
| `f64x2.ne` | 84 | - |
112+
| `i8x16.lt_s` | 85 | - |
113+
| `i8x16.lt_u` | 86 | - |
114+
| `i16x8.lt_s` | 87 | - |
115+
| `i16x8.lt_u` | 88 | - |
116+
| `i32x4.lt_s` | 89 | - |
117+
| `i32x4.lt_u` | 90 | - |
118+
| `f32x4.lt` | 93 | - |
119+
| `f64x2.lt` | 94 | - |
120+
| `i8x16.le_s` | 95 | - |
121+
| `i8x16.le_u` | 96 | - |
122+
| `i16x8.le_s` | 97 | - |
123+
| `i16x8.le_u` | 98 | - |
124+
| `i32x4.le_s` | 99 | - |
125+
| `i32x4.le_u` | 100 | - |
126+
| `f32x4.le` | 103 | - |
127+
| `f64x2.le` | 104 | - |
128+
| `i8x16.gt_s` | 105 | - |
129+
| `i8x16.gt_u` | 106 | - |
130+
| `i16x8.gt_s` | 107 | - |
131+
| `i16x8.gt_u` | 108 | - |
132+
| `i32x4.gt_s` | 109 | - |
133+
| `i32x4.gt_u` | 110 | - |
134+
| `f32x4.gt` | 113 | - |
135+
| `f64x2.gt` | 114 | - |
136+
| `i8x16.ge_s` | 115 | - |
137+
| `i8x16.ge_u` | 116 | - |
138+
| `i16x8.ge_s` | 117 | - |
139+
| `i16x8.ge_u` | 118 | - |
140+
| `i32x4.ge_s` | 119 | - |
141+
| `i32x4.ge_u` | 120 | - |
142+
| `f32x4.ge` | 123 | - |
143+
| `f64x2.ge` | 124 | - |
144+
| `f32x4.neg` | 125 | - |
145+
| `f64x2.neg` | 126 | - |
146+
| `f32x4.abs` | 127 | - |
147+
| `f64x2.abs` | 128 | - |
148+
| `f32x4.min` | 129 | - |
149+
| `f64x2.min` | 130 | - |
150+
| `f32x4.max` | 131 | - |
151+
| `f64x2.max` | 132 | - |
152+
| `f32x4.add` | 133 | - |
153+
| `f64x2.add` | 134 | - |
154+
| `f32x4.sub` | 135 | - |
155+
| `f64x2.sub` | 136 | - |
156+
| `f32x4.div` | 137 | - |
157+
| `f64x2.div` | 138 | - |
158+
| `f32x4.mul` | 139 | - |
159+
| `f64x2.mul` | 140 | - |
160+
| `f32x4.sqrt` | 141 | - |
161+
| `f64x2.sqrt` | 142 | - |
162+
| `f32x4.convert_s/i32x4` | 143 | - |
163+
| `f32x4.convert_u/i32x4` | 144 | - |
164+
| `f64x2.convert_s/i64x2` | 145 | - |
165+
| `f64x2.convert_u/i64x2` | 146 | - |
166+
| `i32x4.trunc_s/f32x4:sat` | 147 | - |
167+
| `i32x4.trunc_u/f32x4:sat` | 148 | - |
168+
| `i64x2.trunc_s/f64x2:sat` | 149 | - |
169+
| `i64x2.trunc_u/f64x2:sat` | 150 | - |

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