i64x2.ne instruction

Author: Maratyszcza

proposals/simd/BinarySIMD.md

@@ -249,3 +249,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `v128.store16_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx8  |
 | `v128.store32_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx4  |
 | `v128.store64_lane`         |     `TBD`| m:memarg, i:ImmLaneIdx2  |
+| `i64x2.ne`                  |     `TBD`| -                        |

proposals/simd/ImplementationStatus.md

@@ -217,6 +217,7 @@
 | `v128.store16_lane`         |                           |                    |                    |                    |                    |
 | `v128.store32_lane`         |                           |                    |                    |                    |                    |
 | `v128.store64_lane`         |                           |                    |                    |                    |                    |
+| `i64x2.ne`                  |                           |                    |                    |                    |                    |
 
 [1] Tip of tree LLVM as of May 20, 2020
 

proposals/simd/SIMD.md

@@ -735,6 +735,7 @@ def S.eq(a, b):
 * `i8x16.ne(a: v128, b: v128) -> v128`
 * `i16x8.ne(a: v128, b: v128) -> v128`
 * `i32x4.ne(a: v128, b: v128) -> v128`
+* `i64x2.ne(a: v128, b: v128) -> v128`
 * `f32x4.ne(a: v128, b: v128) -> v128`
 * `f64x2.ne(a: v128, b: v128) -> v128`