@@ -24,6 +24,7 @@ class SimdBitWise(SIMD):
2424 (func (export "bitselect") (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
2525 (v128.bitselect (local.get $0) (local.get $1) (local.get $2))
2626 )
27+ (func (export "andnot") (param $0 v128) (param $1 v128) (result v128) (v128.andnot (local.get $0) (local.get $1)))
2728)
2829{normal_case}"""
2930
@@ -116,7 +117,12 @@ def get_invalid_case(self):
116117 ['#' , 'bitselect' ],
117118 ["v128.bitselect" , ['0' , '0' , '0' ], [], ['i32' , 'i32x4' , 'i32x4' ]],
118119 ["v128.bitselect" , ['0' , '0' , '0' ], [], ['i32x4' , 'i32x4' , 'i32' ]],
119- ["v128.bitselect" , ['0' , '0' , '0' ], [], ['i32' , 'i32' , 'i32' ]]
120+ ["v128.bitselect" , ['0' , '0' , '0' ], [], ['i32' , 'i32' , 'i32' ]],
121+
122+ ['#' , 'andnot' ],
123+ ["v128.andnot" , ['0' , '0' ], [], ['i32' , 'i32x4' ]],
124+ ["v128.andnot" , ['0' , '0' ], [], ['i32x4' , 'i32' ]],
125+ ["v128.andnot" , ['0' , '0' ], [], ['i32' , 'i32' ]]
120126 ]
121127
122128 lst_ipr = self .init_case_data (case_data )
@@ -168,6 +174,7 @@ def get_combination_case(self):
168174 ["v128.or" , ['0' , '1' ], [], ['i32' , 'i32' ]],
169175 ["v128.xor" , ['0' , '1' ], [], ['i32' , 'i32' ]],
170176 ["v128.bitselect" , ['0' , '1' , '2' ], [], ['i32' , 'i32' , 'i32' ]],
177+ ["v128.andnot" , ['0' , '1' ], [], ['i32' , 'i32' ]],
171178 ]
172179 lst_ipr = self .init_case_data (case_data )
173180
@@ -223,10 +230,9 @@ def get_combination_case(self):
223230 '\n (v128.load (i32.const 1))' \
224231 '\n (v128.load (i32.const 2))' \
225232 '\n )' \
226- '\n (v128.bitselect ' \
233+ '\n (v128.andnot ' \
227234 '\n (v128.load (i32.const 0))' \
228235 '\n (v128.load (i32.const 1))' \
229- '\n (v128.load (i32.const 2))' \
230236 '\n )' \
231237 '\n )' \
232238 '\n )' \
@@ -330,6 +336,20 @@ def get_case_data(self):
330336 ['0x55555555' , '0xAAAAAAAA' , '0x00000000' , '0xFFFFFFFF' ]],
331337 [['0x00000000' , '0xFFFFFFFF' , '0x55555555' , '0xAAAAAAAA' ]],
332338 ['i32x4' , 'i32x4' , 'i32x4' , 'i32x4' ]],
339+ ["andnot" , [['0' , '-1' ], ['0' , '-1' , '0' , '-1' ]], [['0' , '0' , '-1' , '0' ]], ['i32x4' , 'i32x4' , 'i32x4' ]],
340+ ["andnot" , ['0' , '0' ], ['0' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
341+ ["andnot" , ['0' , '-1' ], ['0' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
342+ ["andnot" , ['0' , '0xFFFFFFFF' ], ['0' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
343+ ["andnot" , ['1' , '1' ], ['0' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
344+ ["andnot" , ['255' , '85' ], ['170' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
345+ ["andnot" , ['255' , '128' ], ['127' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
346+ ["andnot" , ['2863311530' , ['10' , '128' , '5' , '165' ]], [['2863311520' , '2863311402' , '2863311530' , '2863311370' ]],
347+ ['i32x4' , 'i32x4' , 'i32x4' ]],
348+ ["andnot" , ['0xFFFFFFFF' , '0x55555555' ], ['0xAAAAAAAA' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
349+ ["andnot" , ['0xFFFFFFFF' , '0xAAAAAAAA' ], ['0x55555555' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
350+ ["andnot" , ['0xFFFFFFFF' , '0x0' ], ['0xFFFFFFFF' ], ['i32x4' , 'i32x4' , 'i32x4' ]],
351+ ["andnot" , ['0x55555555' , ['0x5555' , '0xFFFF' , '0x55FF' , '0x5FFF' ]], ['0x55550000' ],
352+ ['i32x4' , 'i32x4' , 'i32x4' ]],
333353
334354 ['#' , 'for float special data [e.g. -nan nan -inf inf]' ],
335355 ["not" , ['-nan' ], ['5.87747e-39' ], ['f32x4' , 'f32x4' ]],
@@ -379,7 +399,18 @@ def get_case_data(self):
379399 ["bitselect" , ['nan' , 'inf' ,'0xA5A5A5A5' ], ['inf' ], ['f32x4' , 'f32x4' , 'f32x4' , 'f32x4' ]],
380400 ["bitselect" , ['-inf' , '-inf' ,'0xA5A5A5A5' ], ['-inf' ], ['f32x4' , 'f32x4' , 'f32x4' , 'f32x4' ]],
381401 ["bitselect" , ['-inf' , 'inf' ,'0xA5A5A5A5' ], ['inf' ], ['f32x4' , 'f32x4' , 'f32x4' , 'f32x4' ]],
382- ["bitselect" , ['inf' , 'inf' ,'0xA5A5A5A5' ], ['inf' ], ['f32x4' , 'f32x4' , 'f32x4' , 'f32x4' ]]
402+ ["bitselect" , ['inf' , 'inf' ,'0xA5A5A5A5' ], ['inf' ], ['f32x4' , 'f32x4' , 'f32x4' , 'f32x4' ]],
403+
404+ ["andnot" , ['-nan' , '-nan' ], ['0x00000000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
405+ ["andnot" , ['-nan' , 'nan' ], ['-0' ], ['f32x4' , 'f32x4' , 'f32x4' ]],
406+ ["andnot" , ['-nan' , '-inf' ], ['0x00400000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
407+ ["andnot" , ['-nan' , 'inf' ], ['0x80400000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
408+ ["andnot" , ['nan' , 'nan' ], ['0x00000000' ], ['f32x4' , 'f32x4' , 'f32x4' ]],
409+ ["andnot" , ['nan' , '-inf' ], ['0x00400000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
410+ ["andnot" , ['nan' , 'inf' ], ['0x00400000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
411+ ["andnot" , ['-inf' , '-inf' ], ['0x00000000' ], ['f32x4' , 'f32x4' , 'f32x4' ]],
412+ ["andnot" , ['-inf' , 'inf' ], ['0x80000000' ], ['f32x4' , 'f32x4' , 'i32x4' ]],
413+ ["andnot" , ['inf' , 'inf' ], ['0x00000000' ], ['f32x4' , 'f32x4' , 'i32x4' ]]
383414 ]
384415
385416 def gen_test_cases (self ):
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