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ngzhianngzhian
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Rename shuffle and swizzle to i8x16 prefix (#321)
v8x16.shuffle and v8x16.swizzle is now i8x16.shuffle and i8x16.swizzle respectively. Fixed #316.
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13 files changed

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‎interpreter/binary/decode.ml‎

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Original file line numberDiff line numberDiff line change
@@ -234,8 +234,8 @@ let simd_prefix s =
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| 0x0al -> let a, o = memop s in v64x2_load_splat a o
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| 0x0bl -> let a, o = memop s in v128_store a o
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| 0x0cl -> v128_const (at v128 s)
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| 0x0dl -> v8x16_shuffle (List.init 16 (fun x -> u8 s))
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| 0x0el -> v8x16_swizzle
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| 0x0dl -> i8x16_shuffle (List.init 16 (fun x -> u8 s))
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| 0x0el -> i8x16_swizzle
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| 0x0fl -> i8x16_splat
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| 0x10l -> i16x8_splat
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| 0x11l -> i32x4_splat

‎interpreter/syntax/operators.ml‎

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Original file line numberDiff line numberDiff line change
@@ -247,8 +247,8 @@ let v128_or = Binary (V128 (V128Op.V128 V128Op.Or))
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let v128_xor = Binary (V128 (V128Op.V128 V128Op.Xor))
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let v128_bitselect = Ternary (V128Op.Bitselect)
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let v8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle))
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let v8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms)))
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let i8x16_swizzle = Binary (V128 V128Op.(I8x16 Swizzle))
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let i8x16_shuffle imms = Binary (V128 V128Op.(I8x16 (Shuffle imms)))
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let i8x16_splat = Convert (V128 (V128Op.I8x16 V128Op.Splat))
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let i8x16_extract_lane_s imm = SimdExtract (V128Op.I8x16 (SX, imm))

‎interpreter/text/arrange.ml‎

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@@ -231,8 +231,8 @@ struct
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| _ -> failwith "Unimplemented v128 unop"
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let binop xx (op : binop) = match op with
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| I8x16 (Shuffle imms) -> "v8x16.shuffle " ^ (String.concat " " (List.map nat imms))
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| I8x16 Swizzle -> "v8x16.swizzle"
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| I8x16 (Shuffle imms) -> "i8x16.shuffle " ^ (String.concat " " (List.map nat imms))
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| I8x16 Swizzle -> "i8x16.swizzle"
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| I8x16 Eq -> "i8x16.eq"
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| I8x16 Ne -> "i8x16.ne"
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| I8x16 LtS -> "i8x16.lt_s"

‎interpreter/text/lexer.mll‎

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Original file line numberDiff line numberDiff line change
@@ -479,8 +479,8 @@ rule token = parse
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| (simd_float_shape as s)".le" { BINARY (simd_float_op s f32x4_le f64x2_le) }
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| (simd_float_shape as s)".gt" { BINARY (simd_float_op s f32x4_gt f64x2_gt) }
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| (simd_float_shape as s)".ge" { BINARY (simd_float_op s f32x4_ge f64x2_ge) }
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| "v8x16.swizzle" { BINARY v8x16_swizzle }
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| "v8x16.shuffle" { SHUFFLE }
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| "i8x16.swizzle" { BINARY i8x16_swizzle }
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| "i8x16.shuffle" { SHUFFLE }
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| vxxx".not" { UNARY v128_not }
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| vxxx".and" { UNARY v128_and }
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| vxxx".andnot" { UNARY v128_andnot }

‎interpreter/text/parser.mly‎

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Original file line numberDiff line numberDiff line change
@@ -400,7 +400,7 @@ plain_instr :
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| EXTRACT_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) }
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| REPLACE_LANE NAT { let at = at () in fun c -> $1 (simd_lane_index $2 at) }
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| SHIFT { fun c -> $1 }
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| SHUFFLE literal_list { let at = at () in fun c -> v8x16_shuffle (shuffle_literal $2 at) }
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| SHUFFLE literal_list { let at = at () in fun c -> i8x16_shuffle (shuffle_literal $2 at) }
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call_instr :

‎proposals/simd/BinarySIMD.md‎

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Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ instr ::= ...
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Some SIMD instructions have additional immediate operands following `simdop`.
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These immediate operands are encoded as individual bytes.
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For example, the `v8x16.shuffle` instruction has 16 bytes after `simdop`.
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For example, the `i8x16.shuffle` instruction has 16 bytes after `simdop`.
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In the description below, `ImmLaneIdx{I}` indicates the maximum value of the byte.
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For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
@@ -45,8 +45,8 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `v64x2.load_splat` | `0x0a`| m:memarg |
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| `v128.store` | `0x0b`| m:memarg |
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| `v128.const` | `0x0c`| i:ImmByte[16] |
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| `v8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] |
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| `v8x16.swizzle` | `0x0e`| - |
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| `i8x16.shuffle` | `0x0d`| s:ImmLaneIdx32[16] |
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| `i8x16.swizzle` | `0x0e`| - |
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| `i8x16.splat` | `0x0f`| - |
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| `i16x8.splat` | `0x10`| - |
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| `i32x4.splat` | `0x11`| - |

‎proposals/simd/ImplementationStatus.md‎

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@@ -13,8 +13,8 @@
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| `v64x2.load_splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `v128.store` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `v128.const` | `-munimplemented-simd128` | :heavy_check_mark: [6] | | | :heavy_check_mark: |
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| `v8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `v8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i8x16.shuffle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i8x16.swizzle` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i8x16.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i16x8.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i32x4.splat` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |

‎proposals/simd/NewOpcodes.md‎

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Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@
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| Basic operation | opcode |
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| ----------------| ------ |
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| v128.const | 0x0c |
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| v8x16.shuffle | 0x0d |
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| v8x16.swizzle | 0x0e |
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| i8x16.shuffle | 0x0d |
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| i8x16.swizzle | 0x0e |
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| Splat operation | opcode |
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| --------------- | ------ |

‎proposals/simd/SIMD.md‎

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@@ -300,7 +300,7 @@ The input lane value, `x`, is interpreted the same way as for the splat
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instructions. For the `i8` and `i16` lanes, the high bits of `x` are ignored.
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### Shuffling using immediate indices
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* `v8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128`
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* `i8x16.shuffle(a: v128, b: v128, imm: ImmLaneIdx32[16]) -> v128`
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Returns a new vector with lanes selected from the lanes of the two input vectors
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`a` and `b` specified in the 16 byte wide immediate mode operand `imm`. This
@@ -320,7 +320,7 @@ def S.shuffle(a, b, s):
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```
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### Swizzling using variable indices
323-
* `v8x16.swizzle(a: v128, s: v128) -> v128`
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* `i8x16.swizzle(a: v128, s: v128) -> v128`
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Returns a new vector with lanes selected from the lanes of the first input
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vector `a` specified in the second input vector `s`. The indices `i` in range

‎proposals/simd/TextSIMD.md‎

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Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@ The canonical text format used for printing `v128.const` instructions is
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v128.const i32x4 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN 0xNNNNNNNN
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```
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### v8x16.shuffle
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### i8x16.shuffle
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```
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v8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5
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i8x16.shuffle i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5 i5
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```

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