@@ -40,16 +40,16 @@ final case class InputsComposer(
4040 def getModuleInputs : Either [BuildException , Seq [ModuleInputs ]] =
4141 if allowForbiddenFeatures then
4242 findModuleConfig match {
43- case Right (Some (path )) =>
44- val configText = os.read(path )
43+ case Right (Some (moduleConfigPath )) =>
44+ val configText = os.read(moduleConfigPath )
4545 for {
4646 table <-
4747 toml.Toml .parse(configText).left.map(e =>
4848 ModuleConfigurationError (e._2)
4949 ) // TODO use the Address value returned to show better errors
5050 modules <- readAllModules(table.values.get(Keys .modules))
5151 _ <- checkForCycles(modules)
52- moduleInputs <- fromModuleDefinitions(modules)
52+ moduleInputs <- fromModuleDefinitions(modules, moduleConfigPath )
5353 } yield moduleInputs
5454 case Right (None ) => basicInputs
5555 case Left (err) => Left (err)
@@ -177,7 +177,7 @@ final case class InputsComposer(
177177 * @return
178178 * a list of module inputs for the extracted modules
179179 */
180- private def fromModuleDefinitions (modules : Seq [ModuleDefinition ])
180+ private def fromModuleDefinitions (modules : Seq [ModuleDefinition ], moduleConfigPath : os. Path )
181181 : Either [BuildException , Seq [ModuleInputs ]] = either {
182182 val moduleInputsInfo = modules.map(m => m -> value(inputsFromArgs(m.roots)))
183183
@@ -188,6 +188,7 @@ final case class InputsComposer(
188188 val moduleDeps : Seq [ProjectName ] = moduleDef.dependsOn.map(projectNameMap)
189189
190190 inputs.dependsOn(moduleDeps)
191+ inputs.withForcedWorkspace(moduleConfigPath / os.up)
191192 }
192193
193194 moduleInputs
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